CY62148EV30LL-45ZSXI Bit inversion

[MiNe_85951]

Hi,

I think that the cause of SRAM's data bit inversion is soft error and power supply noise.

Are there any other factors that cause bit inversion?

If you know other possible factors, please provide us.

Regards,

[MiNe_85951]

I will add it because there was a lack of information.

Naturally, this is a factor that causes data inversion when the power is always on and data has not been accessed for a long time.
The power supply voltage is in a state where power supply reset has not been performed using the power supply monitoring IC.

[PradiptaB_11 · Accepted solution]

Hi Masashi-san,

You have mentioned the correct reasons for a bit inversion mainly a single event upset. We have a app note on this topic which discusses this in detail.

https://www.cypress.com/documentation/application-notes/an88889-mitigating-single-event-upsets-using...

Generally bit inversions can take place due to any disturbances. Say if the power supply is noisy, or the leakage currents are large in the circuit, or due to unwanted writes which may happen if the control signals are not monitored/ applied properly.

Thanks and Regards,

Pradipta.

[MiNe_85951]

Pradipta-san,

Thank you for your reply.

It turned out that the possibility of data corruption is low even if it is passed for a long time while supplying a stable voltage to the SRAM.

Currently, data inversion seems to occur frequently, so we look for power supply noise or incorrect write timing.

Regards,

Masashi