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On the cy8c20234 cpu, I have created two projects on PSOC Designer 5.4, one in Assembly, the other in C. I can get the internal timer interrupt to work correctly in assembly, but it does not seem to work in C. This CPU must also work with I2C. Those are the only two "features" I need from this CPU.
What could I be doing wrong?
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Can you kindly refer to Implementing an Interrupt Service Routine in C on the PSoC1.
You can redirect interrupts to your functions from the interrupt vector table or from the code generated for timer. If you are redirectng to your interrupt handlers from the interrupt vector table, you must make sure to make use of
#pragma interrupt_handler
and if you are redirecting from code generated for User Modules with an ljmp
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Can you kindly refer to Implementing an Interrupt Service Routine in C on the PSoC1.
You can redirect interrupts to your functions from the interrupt vector table or from the code generated for timer. If you are redirectng to your interrupt handlers from the interrupt vector table, you must make sure to make use of
#pragma interrupt_handler
and if you are redirecting from code generated for User Modules with an ljmp
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ljmp is incorrect. I looked at the assembly generated code and noticed that my interrupt function returned with ret instead of reti. To correctly tie my C function to it's corresponding interrupt table address, I had to use lcall which allowed the function to return so it could subsequently run reti found on the address that followed at the interrupt table. Besides that, everything else that was explained is correct and helpful.
Thank you.
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The ljmp will work. You just need to insert the required
#pragma interrupt_handler YourHandlerName
and the reti instruction will be generated.
Bob
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I looked over the code and did notice that my #pragma had a typo in the handler name. Even though I have not tested this, I will assume that had the #pragma been correctly written that the handler would use reti instead of ret.
Still, I find that to be a strange design choice considering that the CPU interrupt table is clearly designed for lcall commands instead of ljmp commands since there is a 4 byte gap between reserved addresses with the fourth byte being reti. If ljmp was intended by the chip designer, the reserved addresses would only need to be 3 bytes wide.