PSoC5 Alternate Active Mode Current Consumption

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grwa_1467631
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Hello Cypress Community.

Hope you help me out.  I am trying to use the Alternate Active Mode on a PSoC5 design, but I am not seeing any change in the current draw from the MCU.

I am using a CY8CKIT-059 dev board, with the kit prog removed.

I started the project from the SleepTimer_Interrupt_Sleep example project.

This project puts the PSoC into sleep mode, using the SleepTimer to wake the system back up periodically.

Only change I made was to disable the PLL in the project.

When I compile and flash the board using the project as is, I see the current drop from about 9mA to ~200uA, or 1200uA when then LED is on.

So this all seems to work just fine.

But when I change from using Sleep Mode to Alternate Active mode, using the following code, I don't see any change in current.

            //CyPmSleep(PM_SLEEP_TIME_NONE, PM_SLEEP_SRC_CTW);

            CyPmAltAct(PM_ALT_ACT_TIME_NONE, PM_ALT_ACT_SRC_INTERRUPT);

I've added one digital output that I set high just before I send the sleep or AltAct command, so I see that I am going into sleep and that the interrupt is waking the system back up, at which point I set the digital output low.  Watching with a scope I can see that bit is set high most of the time, while waiting for the sleep timer.

The behavior is the same when I send the AltAct command, but I don't see any drop in current.

Any thoughts?

Thanks,

Greg

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Vasanth
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250 sign-ins 500 solutions authored First question asked

Hello Greg,

In CYDWR -> Systems tab -> Change Debug select option to GPIO and see the current. You will not be able to debug with this option. When the debug select option is chosen to “SWD”, the drive mode of SWD pins is configured as Strong drive. This is can result in high current consumption.

Best Regards,

Vasanth

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Len_CONSULTRON
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Greg,

Can you provide an archive of this project?

Len

Len
"Engineering is an Art. The Art of Compromise."
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Attachments are accessible only for community members.

Len,

Here is the project.

Thanks for looking at it.


Greg

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Vasanth
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250 sign-ins 500 solutions authored First question asked

Hi Greg,

In Active or AltAct mode, you can control the power to most subsystems with the power mode configuration registers. The 14 PM_ACT_CFGx registers gate power and clocks in Active mode. The 14 PM_STBY_CFGx registers apply to AltAct mode. Did you try configuring these registers ?

Best Regards,
Vasanth

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Vasanth,

I've read the TRM and the Register Manual.  But I don't see a specific bit for the control of the clock to the MCU.

All the analog and digital clocks are off, as are the clocks for the UDBs, timers, ADC, DAC, switched cap blocks.

To be honest I am not really sure what to do with the bits in PM_STBY_CFG0.  Does one of these bits control the MCU Core?


Greg

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Vasanth
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250 sign-ins 500 solutions authored First question asked

Hello Greg,

In CYDWR -> Systems tab -> Change Debug select option to GPIO and see the current. You will not be able to debug with this option. When the debug select option is chosen to “SWD”, the drive mode of SWD pins is configured as Strong drive. This is can result in high current consumption.

Best Regards,

Vasanth

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Len_CONSULTRON
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Greg,

I'm still looking over your project.  I need to familiarize myself more with the power modes for the 5LP.

Meanwhile here are some helpful links if you don't already have them:

Here is a link to a current consumption calculator: https://www.cypress.com/file/45771/download

Here is a link to a App Note for PSoC5LP power reduction:  https://www.cypress.com/file/45776/download

Len

Len
"Engineering is an Art. The Art of Compromise."
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Len_CONSULTRON
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Greg,

I did a little research.

Queston:  When you say "But when I change from using Sleep Mode to Alternate Active mode, using the following code, I don't see any change in current.", do you mean that you notice no change in current from Active mode or from Sleep Mode?

I noticed the following statement from "AN77900_PSoC_3_and_PSoC_5LP_LowPower_Modes_and_Power_Reduction_Techniques.pdf" when using AltAct Mode ... "If any interrupts are pending, the PSoC device immediately returns to Active mode."

It is my understanding from the above AppNote that AltAct Mode is just an Active Mode with the CPU clock turned off.

In Active mode, the CPU @ 24MHz delta current is 12100uA.  In AltAct mode, the CPU is off which should be subtract the Active delta current.

From what I can tell, the input clocks to all configured peripheral circuits (UDBs, Timers, ADCs, etc) are not stopped.  This means that those peripherals will continue to draw their uA/MHz portion of current.  Since your project does not include any such peripherals, this should not be a problem.

I'm assuming you're using AltAct mode to improve the wakeup timing.

Len

Len
"Engineering is an Art. The Art of Compromise."
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Len,


Sorry for the confusion.

I was referring to changing from active mode to sleep.  I see the reduction in current I would expect.

But when I change from Active mode to AltActive mode, I don't see any reduction in current.

From your testing, there is either an small increase or a 30% decrease.  But I would think that there would be a greater reduction

if the CPU is stopped.

I've read the app notes, datasheets, TRM etc.  This is what leads me to believe that reduction should be higher.

I am trying to use this mode because I will need several peripherals running, but don't need the CPU until an event.

I thought I would start with a simple example where it should be easy to get running.

Thanks again.

Greg

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Greg,

You'll notice the comment about executing the CyPmSaveClocks() when using the AltAct Mode.  With CyPmSaveClocks() prior to CyPmAltAct(), the current increases slightly.   Commenting out CyPmSaveClocks(), CyPmAltAct() lowers by 3700uA.

I was using the current consumption calculator Cypress provides.  I tried to configure the info based on your TopDesign which basically has NOTHING running except the SleepTimer component.

The calculator indicates that in Sleep Mode the PSoC should be consuming <2uA.  I'm reading almost 1000 times more current in this mode.

The calculator indicates that in AltActMode the PSoC should be consuming <452uA.  I'm reading 14 times more current in this mode.

Note:  My current measurements are being read across pins 1 and 2 of J4 with R20 (0 ohm resistor) removed on the 059-kit board.  The power source is about 4.7V from the USB.

Something else is going on.  The currents read should be much closer if not lower than those reported in the current estimation calculator.

I've consulted the 059-kit board schematics and cannot find any unexpected leakage paths.

Len

Len
"Engineering is an Art. The Art of Compromise."
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Len_CONSULTRON
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Greg,

Here's more empirical information.

I've compiled and ran your program.  Here are my results:

PM modeCurrentComment
Active10.07mA
Sleep1.145mA
AltAct (with CyPmSaveClocks)10.89mAActually higher than Active mode
AltAct (without CyPmSaveClocks)6.36mAReduces current by 3.7mA from Active mode

Here's a snippet from "AN77900_PSoC_3_and_PSoC_5LP_LowPower_Modes_and_Power_Reduction_Techniques.pdf".

"C.1 CyPmSaveClocks()

This function prepares the PSoC clocks for low-power operation. It should be called immediately before entering Sleep or Hibernate mode. It is not typically called before entering AltAct mode because the clocks are expected to remain in operation.

Failure to call this function before entering Sleep or Hibernate mode may result in undefined behavior."

Len

Update (5/11/2019)

Using Vasanth suggestion I have new current data:

PM modeCurrentComment
Active9.02mA
Sleep1.45uAThis is predicted by the Cypress Power calculator
AltAct (with CyPmSaveClocks)9.82mAActually higher than Active mode
AltAct (without CyPmSaveClocks) 5.28mAReduces current by 4.7mA from Active mode

Len
"Engineering is an Art. The Art of Compromise."
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