Apr 27, 2019
10:04 PM
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Apr 27, 2019
10:04 PM
Hey,
I would like to use your HyperBus memory.
My board will contain cyclone V too.
My question is, how the clock pin in the HyperBus should be connected?
To a standard IO of the FPGA or to a dedicated CLK pin.
Best regards,
Peleg
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May 06, 2019
09:54 PM
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May 06, 2019
09:54 PM
Hi Peleg,
In our reference design of the HyperBus controller in FPGA, we use a standard IO for the HyperBus CLK. I think many of 3rd party HyperBus controller (for FPGAs) also use a standard IO.
Thanks,
Takahiro
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May 06, 2019
09:54 PM
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May 06, 2019
09:54 PM
Hi Peleg,
In our reference design of the HyperBus controller in FPGA, we use a standard IO for the HyperBus CLK. I think many of 3rd party HyperBus controller (for FPGAs) also use a standard IO.
Thanks,
Takahiro