CYPD 4236 charging problem

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falu_294486
Level 3
Level 3
10 replies posted 5 replies posted Welcome!

Hi,

I used the Dock board, designed by CCG4 4236, and when I encountered charging, I CCG4 not send Source_Cap action on NB.

This image is designed for the circuit architecture

Dock Board.bmp

The following figure is the message caught using CC analyzer, pictured above for normal charging, the following figure is due to CCG4 did not send out Source_Cap after the stop.

Currently rechargeable case with a case that cannot be recharged,

The difference in CC Log cannot be sent out in Source_Cap.

The CASE,CC Log that can currently be recharged is as follows:

charge pass.jpg

The CASE,CC Log, which is currently not rechargeable, is as follows:

charge fail.jpg

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1 Solution

Hi Faco,

If this is one board with difference NB case, you need to check the 5V power source. You can see the VBUS become 5.8V when CCG4 sent PS_RDY.

BTW, I have checked CCG4 dock firmware, we set 3.0V as Maximum voltage allowed when PS_RDY is received during a SNK to SRC PR_SWAP.

#define VSAFE_0V_PR_SWAP_SNK_SRC            (3000u)

/**< Maximum voltage allowed when PS_RDY is received during a SNK to SRC PR_SWAP. This is set to 3.0 V. */

Best Regards,

Lisa

View solution in original post

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6 Replies
ShifangZ_26
Moderator
Moderator
Moderator
10 likes given 250 sign-ins 1000 replies posted

Hi ,

1. May I know which firmware you are based on?

2. Is there any customized on the firmware?

3. It seems this case will be occurred on some sorts of conditions, since you mentioned that the normal one is the SOURCE_CAP have sent out. May I know is there any condition on the port you have been gated in the firmware to become power source?

4. Why the voltage on PS_RDY (first one from sink ) abnormal case have 1.2V voltage on the VBUS? Is there any possible to let them below 800mV? Otherwise, you can try to change the Safe0V define in the firmware of CCG4 from 800 to 3.3V and test it again.

Best Regards,

Lisa

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Hi Lisa,

1. I use CYPD4236 example code as a basis to make changes.

2. I do not use the original example code internal voltage control, charge and discharge control with power swap control.

All of the above actions are notified by UART PD action

3.

a). Dock board has external AC power supply, does not need port 1 adopter or NB 5V power supply

b). CCG4 Port 1 When a adopter is picked up, it will be set at 5V first.

c). After the CCG4 Port 0 is connected to NB, and the power swap instruction is given to the PD IC through command

(Dpm_pd_command (TYPEC_PORT_0_IDX, dpm_cmd_send_pr_swap, NULL, NULL);)

d). After receiving the port 0 conversion voltage notification, the power IC voltage 5V is provided to Port 0 VBUS

(PD actively sends source cap to NB selection)

e). Wait for NB to require 20V voltage and convert port 1 's adopter setting to 20V (Dpm_pd_command (TYPEC_PORT_1_IDX, dpm_cmd_get_src_cap, NULL, NULL);)

4. The PASS and FAIL phenomena occur under the same NB corresponding to the different dock board.

Which side do I have to find out safe0V settings from800 to 3.3V?

thanks

Faco

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Hi Faco,

If this is one board with difference NB case, you need to check the 5V power source. You can see the VBUS become 5.8V when CCG4 sent PS_RDY.

BTW, I have checked CCG4 dock firmware, we set 3.0V as Maximum voltage allowed when PS_RDY is received during a SNK to SRC PR_SWAP.

#define VSAFE_0V_PR_SWAP_SNK_SRC            (3000u)

/**< Maximum voltage allowed when PS_RDY is received during a SNK to SRC PR_SWAP. This is set to 3.0 V. */

Best Regards,

Lisa

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BTW, I have checked CCG4 dock firmware, we set 3.0V as Maximum voltage allowed when PS_RDY is received during a SNK to SRC PR_SWAP

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So that, you need check the VBUS voltage. Why the abnormal case is 5.8V on VBUS.

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The circuit design took into account the depletion problem at the time, so the voltage was adjusted up to 5.8V, causing the voltage to be too high after NB (not as much as expected)

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