Regarding Chip erase and read and write register in S25FL128L

Hi,

   Im trying to do a chip erase / bulk erase using C7 command . After which im trying to write and read register single register using write any register.

I ve attached the code snippet also for the same.its getting stuck in the  chip erase point where the status returned a status of 0x3. kindly help with the issue and tell me whether the code approach is right.

uint8_t spi_flash_read_status_register (void)

{

uint8_t status, dummy_var;

ALLOW_TRANSFER;

PUSH(RDSR); // read status register command - 05

WAIT_UNTIL_RxFIFO_IS_NOT_EMPTY;

POP(dummy_var); // discard one RxFIFO item

PUSH_ENQ(dummy_byte); // status register is returned during this

    WAIT_UNTIL_RxFIFO_IS_NOT_EMPTY;

    POP(status); // read useful data

    return (status);

}

void spi_flash_chip_erase(void)

{

uint8_t status, dummy_var;

    ALLOW_TRANSFER;  // if previous command has set EOQ

PUSH_ENQ(WREN); // write enable command

WAIT_UNTIL_RxFIFO_IS_NOT_EMPTY;

POP(dummy_var); // discard one RxFIFO item

ALLOW_TRANSFER; // if previous command has set EOQ

PUSH_ENQ(CE); // Chip erase command - C7

WAIT_UNTIL_RxFIFO_IS_NOT_EMPTY;

POP(dummy_var); // discard one RxFIFO item

do

{

status = spi_flash_read_status_register();

}

while (status & WIP); // wait here until chip erase is done.

}

void read _register(uint32_t address, uint8_t* p_data)

{

static uint8_t dummy_var;

uint8_t addr0, addr1, addr2 addr3;

addr0 = (uint8_t) (address & 0x000000FF);

addr1 = (uint8_t) ((address & 0x0000FF00) >> 8);

addr2 = (uint8_t) ((address & 0x00FF0000) >> 16);

addr3 = (uint8_t) ((address & 0xFF000000) >> 24);

ALLOW_TRANSFER; // if previous command has set EOQ

PUSH(READ_DATA);  // read data bytes command

WAIT_UNTIL_RxFIFO_IS_NOT_EMPTY;

POP(dummy_var);

PUSH(addr3); // most-significant byte of address

WAIT_UNTIL_RxFIFO_IS_NOT_EMPTY;

POP(dummy_var);

PUSH(addr2); // middle high byte of address

WAIT_UNTIL_RxFIFO_IS_NOT_EMPTY;

POP(dummy_var);

PUSH(addr1); // middle byte of address

WAIT_UNTIL_RxFIFO_IS_NOT_EMPTY;

POP(dummy_var);

PUSH(addr0); // least-significant byte of address

WAIT_UNTIL_RxFIFO_IS_NOT_EMPTY;

POP(dummy_var);

PUSH_ENQ(dummy_byte); // dummy bytes for generating CLK to slave

WAIT_UNTIL_RxFIFO_IS_NOT_EMPTY;

POP(*p_data_bytes);  // read useful data

}

void write_register(uint32_t address, uint8_t* p_data)

{

static uint8_t dummy_var;

uint8_t addr0, addr1, addr2,addr3;

addr0 = (uint8_t) (address & 0x000000FF);

addr1 = (uint8_t) ((address & 0x0000FF00) >> 8);

addr2 = (uint8_t) ((address & 0x00FF0000) >> 16);

addr3 = (uint8_t) ((address & 0xFF000000) >> 24);

PUSH_ENQ(WREN);   // write enable command (must be done before every write !!!)

WAIT_UNTIL_RxFIFO_IS_NOT_EMPTY;

POP(dummy_var);

ALLOW_TRANSFER; // from this point all following write to PUSHR will be sent

PUSH(WRITE_DATA);  // read data bytes command  - 0X65H

WAIT_UNTIL_RxFIFO_IS_NOT_EMPTY;

POP(dummy_var);

PUSH(addr3); // most-significant byte of address

WAIT_UNTIL_RxFIFO_IS_NOT_EMPTY;

POP(dummy_var);

PUSH(addr2); // middle high byte of address

WAIT_UNTIL_RxFIFO_IS_NOT_EMPTY;

POP(dummy_var);

PUSH(addr1); // middle byte of address

WAIT_UNTIL_RxFIFO_IS_NOT_EMPTY;

POP(dummy_var);

PUSH(addr0); // least-significant byte of address

WAIT_UNTIL_RxFIFO_IS_NOT_EMPTY;

POP(dummy_var);

PUSH_ENQ(*p_data); // write data into the register

WAIT_UNTIL_RxFIFO_IS_NOT_EMPTY;

}

Regards,

Vignesh