About UART FIFO Reset for Flaming error

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JuIn_1625121
Level 5
Level 5
100 sign-ins First solution authored 100 replies posted

The customer's application causes a UART framing error under the following conditions:

-First, MB9AF112K receives the number of received data defined by FBYTE.

-Next, before the data reading of the received FIFO, 1 byte data that stop bit is 0 is input to MB9AF112K.

(Of course, this is intentionally created data and condition)

The customer thinks he use FIFO reset to return to the correct state,

but he says that don't solved the case and the UART reset is required.

1)Is using FIFO reset correct for framing errors?

   (I doubt it a little. Because I think framing errors occur without using FIFO.)

2)If so, what is the reason why the above situation can not be solved with FIFO reset?

    Please let me know if there are special conditions or methods.

Best Regards,

Inoue

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1 Solution
RyanZhao
Moderator
Moderator
Moderator
250 sign-ins First question asked 750 replies posted

Inoue-san,

Sorry I haven't understood the customer issue very clearly...

But about framing errors...FIFO reset may not correct framing errors. Framing errors require setting the REC bit to 1 to clear the error.

For more details, please refer Chapter UART in the application note:

https://www.cypress.com/documentation/application-notes/an99218-multifunction-serial-interface-fm-mc...

Thanks,

Ryan

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5 Replies
RyanZhao
Moderator
Moderator
Moderator
250 sign-ins First question asked 750 replies posted

Inoue-san,

Sorry I haven't understood the customer issue very clearly...

But about framing errors...FIFO reset may not correct framing errors. Framing errors require setting the REC bit to 1 to clear the error.

For more details, please refer Chapter UART in the application note:

https://www.cypress.com/documentation/application-notes/an99218-multifunction-serial-interface-fm-mc...

Thanks,

Ryan

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Hi Ryan-san,

Thank you for your answer.

I confirmed the document, and told it to the customer.

Best Regards,

Inoue

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Hi Ryan-san,

The customer already set the REC bit to 1.

He says following settings and results.

1) setting the REC bit to 1

2) FIFO Reset

3) setting the FE2 bit to 1

But, FRE bit is not cleared.

What's wrong?

Best Regards,

Inoue

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Inoue-san,

If REC bit is set to 1, received error must be cleared. But FRE is not cleared. It sound there is continuous FRE error.

Could the customer double-check the settings of both two UART terminal are matched, and the customer can use a UART tool on PC to monitor data of UART and see what is happened...

Thanks,

Ryan

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Hi Ryan-san,

I'm sorry my late reply.

I'm sorry,

already the customer's test system has been disassembled, so the settings can not be checked.

And, she said FRE error is released without problem by using UART reset.

So, I don't think there is continuous FRE error.

Best Regards,

Inoue

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