- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
I can read any registers, I can read/write any memory location but I can NOT configure the config register or status configure.
Can some one point out what to be the problem. (My QSPI clock is 108MHz), my System clock is 100MHZ
The program executed successfully but after reading registers, nothing changed
Here are my functions
void QUADSPI_Init(void)
{
hqspi.Instance = QUADSPI;
hqspi.Init.ClockPrescaler = 255;
hqspi.Init.FifoThreshold = 1;
hqspi.Init.SampleShifting = QSPI_SAMPLE_SHIFTING_HALFCYCLE;
hqspi.Init.FlashSize = 23;
hqspi.Init.ChipSelectHighTime = QSPI_CS_HIGH_TIME_1_CYCLE;
hqspi.Init.ClockMode = QSPI_CLOCK_MODE_0;
hqspi.Init.FlashID = QSPI_FLASH_ID_1;
hqspi.Init.DualFlash = QSPI_DUALFLASH_DISABLE;
HAL_QSPI_Init(&hqspi)
}
HAL_StatusTypeDef AutoPollingMemReady(void)
{
QSPI_CommandTypeDef sCommand;
QSPI_AutoPollingTypeDef sConfig;
/* Configure automatic polling mode to wait for memory ready */
sCommand.InstructionMode = QSPI_INSTRUCTION_1_LINE;
sCommand.Instruction = 0x5; // Read Status Register 1
sCommand.AddressMode = QSPI_ADDRESS_NONE;
sCommand.AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE;
sCommand.DataMode = QSPI_DATA_1_LINE;
sCommand.DummyCycles = 0;
sCommand.DdrMode = QSPI_DDR_MODE_DISABLE;
sCommand.DdrHoldHalfCycle = QSPI_DDR_HHC_ANALOG_DELAY;
sCommand.SIOOMode = QSPI_SIOO_INST_EVERY_CMD;
sConfig.Match = 0;
sConfig.Mask = 1; // Busy bit
sConfig.MatchMode = QSPI_MATCH_MODE_AND;
sConfig.Interval = 0x10;
sConfig.AutomaticStop = QSPI_AUTOMATIC_STOP_ENABLE;
sConfig.StatusBytesSize = 1;
return HAL_QSPI_AutoPolling(&hqspi, &sCommand, &sConfig, HAL_QPSI_TIMEOUT_DEFAULT_VALUE);
}
HAL_StatusTypeDef WriteEnable()
{
QSPI_CommandTypeDef sCommand;
QSPI_AutoPollingTypeDef sConfig;
sCommand.InstructionMode = QSPI_INSTRUCTION_1_LINE;
sCommand.Instruction = 0x06 ; // WREN for non-volatile Regs
sCommand.AddressMode = QSPI_ADDRESS_NONE;
sCommand.AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE;
sCommand.DataMode = QSPI_DATA_NONE;
sCommand.DummyCycles = 0;
sCommand.DdrMode = QSPI_DDR_MODE_DISABLE;
sCommand.DdrHoldHalfCycle = QSPI_DDR_HHC_ANALOG_DELAY;
sCommand.SIOOMode = QSPI_SIOO_INST_EVERY_CMD;
if( HAL_QSPI_Command(&hqspi, &sCommand, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) == HAL_OK)
{
// Configure automatic polling mode to wait for write enabling
sConfig.Match = 2;
sConfig.Mask = 2;
sConfig.MatchMode = QSPI_MATCH_MODE_AND;
sConfig.StatusBytesSize = 1;
sConfig.Interval = 0x10;
sConfig.AutomaticStop = QSPI_AUTOMATIC_STOP_ENABLE;
sCommand.Instruction = 0x05; // status Reg 1
sCommand.DataMode = QSPI_DATA_1_LINE;
sCommand.NbData = 1;
return HAL_QSPI_AutoPolling(&hqspi, &sCommand, &sConfig, HAL_QPSI_TIMEOUT_DEFAULT_VALUE);
}
HAL_StatusTypeDef WriteDisable(QSPI_EEROR_CODES* pStatus)
{
s_command.InstructionMode = QSPI_INSTRUCTION_1_LINE;
s_command.Instruction = 0x04; // Write Disable
s_command.AddressMode = QSPI_ADDRESS_NONE;
s_command.AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE;
s_command.DataMode = QSPI_DATA_NONE;
s_command.DummyCycles = 0;
s_command.DdrMode = QSPI_DDR_MODE_DISABLE;
s_command.DdrHoldHalfCycle = QSPI_DDR_HHC_ANALOG_DELAY;
s_command.SIOOMode = QSPI_SIOO_INST_EVERY_CMD;
return HAL_QSPI_Command(&hqspi, &s_command, HAL_QPSI_TIMEOUT_DEFAULT_VALUE);
}
void WriteRegister(uint8_t* pData)
{
QSPI_CommandTypeDef sCommand;
// Start writing
sCommand.Instruction = 0x0 ; // WRR
sCommand.AddressSize = 24; // 24 bit address
sCommand.DummyCycles = 32; // 8 byte dummy cycle x 4 (Status Register1, Config Reg1, Config Reg2, ConfiReg 3);
sCommand.InstructionMode = QSPI_INSTRUCTION_1_LINE;
sCommand.AddressMode = QSPI_ADDRESS_NONE;
sCommand.AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE;
sCommand.DataMode = QSPI_DATA_1_LINE;
sCommand.NbData = 4;
sCommand.DdrMode = QSPI_DDR_MODE_DISABLE;
sCommand.DdrHoldHalfCycle = QSPI_DDR_HHC_ANALOG_DELAY;
sCommand.SIOOMode = QSPI_SIOO_INST_EVERY_CMD;
// Enable Write
if (S25FL_WriteEnable() != HAL_OK;
return;
// Configure the command
HAL_QSPI_Command(&hqspi, &sCommand, HAL_QPSI_TIMEOUT_DEFAULT_VALUE);
HAL_QSPI_Transmit(&hqspi, pData, HAL_QPSI_TIMEOUT_DEFAULT_VALUE);
AutoPollingMemReady();
WriteDisable(&eStatus);
}
void main()
{
uint8_t uiData[4] = {0,2,0x68, 0x48}; // Nothing change in Status Register 1
WriteRegister(&Data[0]);
}
Thanks,
Solved! Go to Solution.
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hello Thanhson,
Thank you for contacting Cypress Semiconductor.
Please find attached the Serial Low Level Drviers (SLLD) v16.2.1
for your review and analysis.
Should this line, " sCommand.Instruction = 0x5; // Read Status Register 1 "
read as : " sCommand.Instruction = 0x05; // Read Status Register 1 "?
Thank you in advance....
Best regards,
Albert
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hello Thanhson,
Thank you for contacting Cypress Semiconductor.
Please find attached the Serial Low Level Drviers (SLLD) v16.2.1
for your review and analysis.
Should this line, " sCommand.Instruction = 0x5; // Read Status Register 1 "
read as : " sCommand.Instruction = 0x05; // Read Status Register 1 "?
Thank you in advance....
Best regards,
Albert