CY14B101NAおよびCY14B101LAのSTORE/RECALLの内部動作について

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TeMa_2997106
Level 6
Level 6
Distributor - TED (Japan)
10 likes received 10 solutions authored 250 replies posted

nvSRAMのSTORE/RECALLは、すべてのアドレス(すべてのデータ)を同時にSTORE/RECALLするのでしょうか。

nvSRAMを使用検討する前に、SRAM+Batteryの運用をしていましたが、

SRAMの際には電源が中途半端に落ちたときなどに、データが全部壊れず、一部のみ壊れることがありました。

SRAMからSONOSへのSTOREが全bit同時に書き込むのであれば、

その後に正しくSTOREできていたかを確認するのに、ある特定のアドレスを見てOK/NGの判断をする、

という運用をしようと考えています。

逆に、いくつかのエリアに分けて順番にSTORE/RECALLするのであれば、

チェックする箇所(アドレス)を複数個所にする必要が生じるかと考えています。

宜しくお願い致します。

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1 解決策

Matsubara-san,

Sorry for our late!

Got from RAM expertise: starting address to STORE: 0x00000 and end address to STORE: 0x0FFFF.

Thanks,

Ryan

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6 返答(返信)
RyanZhao
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Matsubara-san,

The entire data is not copied simultaneously. There are internal buffers present in the device which take the data from the SRAM and store in the SONOS. The whole operation will take tSTOTE time as specified in the datasheet.

Thanks,

Ryan

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TeMa_2997106
Level 6
Level 6
Distributor - TED (Japan)
10 likes received 10 solutions authored 250 replies posted

Ryan-san,

Thank you for your answer.

There are another questions about your answer.

1)

What is the size of the internal buffer?

2)

How different is the timing of writing to SONOS from the internal buffers?

3)

How can the user check if the data store correctly?

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Matsubara-san,

1) What is the size of the internal buffer?

Ans) Only one row can be selected at a time internally, hence transfer will happen row by row and not simultaneously (as per Logic Block Diagram in datasheet, there are 1024 rows totally in CY14B101NA/CY14B101LA).

2) How different is the timing of writing to SONOS from the internal buffers?

Ans) The "internal buffer" is basic transistors(looks more like switches) between each SRAM and SONOS cell. So there is no difference for writing to SONOS from the internal buffers or SRAM.

3) How can the user check if the data store correctly?

Ans) Actually there is no easy way to indicate that the store happened correctly. Only if one is testing the device for correct functionality one can write a known pattern to the memory, store the pattern and then perform a recall operation and check if the now the read data is same as the known pattern or not.

Thanks,

Ryan

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TeMa_2997106
Level 6
Level 6
Distributor - TED (Japan)
10 likes received 10 solutions authored 250 replies posted

Ryan-san,

Where is the address to STORE first?

And, where is the last address to STORE?

The customer want to be consistent by checking the first address and end address.

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Matsubara-san,

Sorry for our late!

Got from RAM expertise: starting address to STORE: 0x00000 and end address to STORE: 0x0FFFF.

Thanks,

Ryan

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TeMa_2997106
Level 6
Level 6
Distributor - TED (Japan)
10 likes received 10 solutions authored 250 replies posted

Ryan-san,

Thank you for your answer.

I could understand.

Thanks,

Tetsuo

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