Battery level % measurement confusion :(

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alkhc_3773311
Level 1
Level 1

Hello everyone,

I've been working with the Battery level sensing characteristic of the BLE Temperature measurement project. I'm trying to have a through understanding of each and every step of the measurement process.

Here is some of the main code provided for the Battery level sensing aspect:

/*
Set the reference to 1.024V and enable reference bypass */

      sarControlReg
=
ADC_SAR_CTRL_REG & ~ADC_VREF_MASK;

      ADC_SAR_CTRL_REG = sarControlReg
|
ADC_VREF_INTERNAL1024BYPASSED;

     

      /* 25 ms delay
for reference capacitor to charge */

      CyDelay(25u);            

     

      /* Set the
reference to VDD and disable reference bypass */

      sarControlReg
=
ADC_SAR_CTRL_REG & ~ADC_VREF_MASK;

      ADC_SAR_CTRL_REG = sarControlReg
|
ADC_VREF_VDDA;

      /* Perform a
measurement. Store this value in Vref. */

      CyDelay(1u);

      ADC_StartConvert();

      ADC_IsEndConversion(ADC_WAIT_FOR_RESULT);

      /* Set the
reference to 1.024V and enable reference bypass */

      sarControlReg
=
ADC_SAR_CTRL_REG & ~ADC_VREF_MASK;

      ADC_SAR_CTRL_REG = sarControlReg
|
ADC_VREF_INTERNAL1024BYPASSED;

       

        adcResult = ADC_GetResult16(ADC_BATTERY_CHANNEL);

      /* Calculate
input voltage by using ratio of ADC counts from reference

      *  and ADC Full Scale counts.

        */

      mvolts
= (1024 * 2048) / adcResult;

       

        /* Convert battery level voltage to
percentage using linear approximation

        *
divided to two sections according to typical performance of

        *
CR2033 battery specification:

        *
3V - 100%

        *
2.8V - 29%

        *
2.0V - 0%

        */

The documentation provided for the project states that no external components are required, such as the resistive divider used to scale VDD to 0-1.024V. Is this because the resistive divider is internal ? The VDD is going to range from 0-3.3V and if the reference is 1.024V, it must be downscaled , right ?

Also I'm working with the CYBLE-221441601 module and from seeing its schematic, it has a  bypass capacitor connected to Vref. I'm assuming I won't need to attach any other components.

Why is the ADC reference set to VDD?

Can someone please explain the measurement process to me and answer my questions. It would be greatly appreciated.

Kind regards,

Alisha Khan

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1 Solution
Vasanth
Moderator
Moderator
Moderator
250 sign-ins 500 solutions authored First question asked

Hello Alisha,

There is no need for a scale down because of the method used to measure the voltage. It has a lot to do with the PSoC SAR ADC architecture. I will explain the same.

PSoC SAR ADC supports different voltage reference options. They can be internal vref(1.024 V), VDDA or external reference. Additionally it also have an option to enable bypass capacitor along with the source selected. Even though this option is used increase the sample rate of the ADC, we use this for some other purpose in this application. When bypass option is enabled the route to the dedicated pin to bypass capacitor will be enabled. The capacitor connected to that pin will be charged to the reference. As the reference is not affected by the VDDA voltage change, this will be the constant value of 1.024.

Now if we dynamically change the reference voltage source to VDDA and hooking up the charged capacitor value as the input to the ADC you will get a count value. If you assume that this VDDA voltage is decaying(from a battery) the count value you get after some time will be higher. So even though the Vref voltage remains the same, as the reference voltage is decreasing , the ADC count you get will be higher. This relation is used to measure the battery voltage in the code example.

So as the capacitor voltage(1.024V) is measured using VDDA as reference( supposed to be around 3.3 or 5V and much higher than 1.024V) , there is no need for down-scaling. The process of keeping Vref bypassed mode as the ADC reference for some time is just to charge the capactior to internal Vref as there is no other option to do the same.

Best Regards,
Vasanth

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1 Reply
Vasanth
Moderator
Moderator
Moderator
250 sign-ins 500 solutions authored First question asked

Hello Alisha,

There is no need for a scale down because of the method used to measure the voltage. It has a lot to do with the PSoC SAR ADC architecture. I will explain the same.

PSoC SAR ADC supports different voltage reference options. They can be internal vref(1.024 V), VDDA or external reference. Additionally it also have an option to enable bypass capacitor along with the source selected. Even though this option is used increase the sample rate of the ADC, we use this for some other purpose in this application. When bypass option is enabled the route to the dedicated pin to bypass capacitor will be enabled. The capacitor connected to that pin will be charged to the reference. As the reference is not affected by the VDDA voltage change, this will be the constant value of 1.024.

Now if we dynamically change the reference voltage source to VDDA and hooking up the charged capacitor value as the input to the ADC you will get a count value. If you assume that this VDDA voltage is decaying(from a battery) the count value you get after some time will be higher. So even though the Vref voltage remains the same, as the reference voltage is decreasing , the ADC count you get will be higher. This relation is used to measure the battery voltage in the code example.

So as the capacitor voltage(1.024V) is measured using VDDA as reference( supposed to be around 3.3 or 5V and much higher than 1.024V) , there is no need for down-scaling. The process of keeping Vref bypassed mode as the ADC reference for some time is just to charge the capactior to internal Vref as there is no other option to do the same.

Best Regards,
Vasanth

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