Since the VCAP is shorted to VCC, as you mentioned, the AutoStore function will not work. So, you have two methods to execute the nonvolatile Store, either via I2C command or using the HSB pin.
Some insight on the nvSRAM RTC settings and its functionality-
When you set the new base time and/or date in the user RTC registers, please make sure you execute the SW store command so that the new time/date set is stored into its nonvolatile counterpart. This setting resets the RTC clock counter to 0 as well. RTC clock counter then increments the RTC tick by 32768 counts every second and accumulates over the time until user resets the base time with a new time. The base time + tick count is used internally by the device to calculate the current time and date whenever user queries them. When the device VCC is down, the RTC clock needs to continue running either on battery or super capacitor power, VRTC_BAT in your schematic. When the VCC power returns, the RTC block power switches to the VCC power to save the battery.
Once you set the new RTC time following which execute the nonvolatile STORE command only once, you need not execute the nonvolatile Store before every reboot or shutdown for the RTC function. However, you need the nonvolatile Store before every reboot or shutdown to save any update.change to the main memory array.
You may observe some lag in time primarily because when you read the RTC register, you set the R bit '1', which freezes the update to the volatile registers. Once you read the RTC register content and clear the R bit, it updates the time to new value. However, this R bit setting only needed to access the RTC register, hence should not take more than few ms with slow I2C access. System power down essentially shouldn't change the RTC accuracy until there is clock error at the input. The inaccurate RTC timing can be either due to crystal accuracy, unmatched crystal load or even the PCB routing/layout for the crystal.
It would be great if you can share the RTC register dump where you observe the time lag and after every power cycle.
You can capture for 2-3 cycles with expected vs read time.
You can measure the 512 Hz digital output clock on the INT/SQW pin to measure the input clock error instead of probing on the analog pins of the crystal (XIN/XOUT). Please refer to the CAL bit setting and related section in the datasheet to enable the clock on the INT.
You can also refer to the following Application note for further details.
AN53313 - Real Time Clock Calibration in Cypress nvSRAM
AN61546 - Nonvolatile Static Random Access Memory (nvSRAM) Real Time Clock (RTC) Design Guidelines and Best Practices