Can I get the BOD by reading some register of PSoC4000S before reseting by BOD hardware block in order to inform of voltage drop to HOST to control power properly?

[Jin-HyungK_31]

My customer is using PSoC4000S connecting to HOST MCU and wants error notification thru GPIO if voltage error happens.

This notification enables HOST to control power system(PMIC) properly for PSoC4000S.

When I look at BOD feature, this only operates from hardware side but if there is a register which enables interrupt trigger, PSoC4000S firmware can notify power failure to HOST.

I'd appreciate if any example snippet and how to use.

[Hari]

Hi

PSoC 4000s cannot detect BOD by reading a register. Please refer to the architecture trm for details, page 86.

Link: https://www.cypress.com/file/230701/download

If you wish to detect a low input voltage, an ADC component can be used that monitors the power line in order to detect any voltage drop.

Thanks and regards

Harigovind

[Jin-HyungK_31]

Thanks, Harigovind.

As PSoC4000S only supports 10bit CSD ADC, customer is using CapSense block(CSD) so that both functionality seems not to be implementable in a single design.

Do you have any example to support both CapSense(CSD) and CSD ADC(voltage measurement) ?

rdgs,

Jin

[Hari]

Hi

You can use the CapSense_ADC component to simultaneously use capsense block and obtain an ADC value.

Please refer the code example CE210311_CapSense_P4_ADC_Sequential as it provides an example to use both capsense and adc for voltage measurements.

Thanks and regards

Harigovind

[Hari]

Hi

Were you able to detect brown-out reset using the CapSense ADC component?

Thanks and regards

Harigovind

[Jin-HyungK_31]

Hi Harigovind,

I could only test Vcc voltage from 4.8V down to 1.78V.

Regardless of BOD, CSD ADC outputs 2.37V when Vcc is 1.78V, which is caused by Vref of CSD ADC along with Vdda voltage in condition of Vdd 3.3V  as noted in PSoC4 CSD ADC v.6.0 document.

My conclusion is when Vdd/Vdda are power with single source, it is difficult to measure correct voltage since one of power should be stable and other power, herein Vdda is feasible to measure.

My final curiosity is how to make Vref of CSD ADC out to one of GPIO.

Can you have any idea to this?

Thanks,

Jin

[Hari · Accepted solution]

Hi Jin

It's not possible to set Vref of CSD ADC through a GPIO.

You could try to set a threshold at some value (say 1.9V) indicating that the system will reset soon.

Voltage lower than 1.78V, the system becomes unstable and measurements are no longer accurate. This is the reason for resetting the device and this is why the ADC measurements are not valid.

Since the goal is to notify the host about a voltage drop, you could consider notifying at a voltage level greater than 1.8V.

Thanks and regards

Harigovind