SPI Transfer separation: how does it work exactly?

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GaRo_3769926
Level 2
Level 2
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Good afternoon to whomever may be reading this, thank you for your time

I'm currently developing a sensor with a PRoCBLE chip (CYBL10162-56LQXI), and I require an SPI communication between the PRoC chip and a BME280 sensor. It's 4-cable SPI.

My problem is that the sensor requires me to read several bytes in a row without rising the CSB (SS0) signal. I've found that, in the SCB block configured as SPI Master (the way I want it) in PSoC Creator 4.2, there is an option for "Transfer separation", which is apparently what I want. The thing is that the documentation is lacking in this regard and I can't find exactly how it works, whether it only works for read+write or only for writing...

SPI_BME280_Read.PNG

This picture schematically represents what I want to do with a multiple-byte read: 1st, it lowers CSB (SS), then PSoC sends through MOSI a byte commanding to read a specific register, then reads a byte, and then reads another one without changing the CSB (SS) signal at all until the end of the reading. Is this possible to do with the PSoC functions as they are, or will I have to bitbang the CSB (SS) signal? Is the "Transfer separation" option just what I need, or does it only work for writing?

Thank you in advance

Gabriel

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1 Solution
himam_31
Employee
Employee
50 likes received 25 likes received 10 likes received

Hello,

The chip select signal will get deactivated based on the TX FIFO status. The signal goes high (in case of active low) whenever the TX FIFO is empty. If the firmware is filling the TX FIFO at right time you will not face any issue. If you are not sure then you can use software control using a different pin.

Thanks,

Hima

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himam_31
Employee
Employee
50 likes received 25 likes received 10 likes received

Hello,

The chip select signal will get deactivated based on the TX FIFO status. The signal goes high (in case of active low) whenever the TX FIFO is empty. If the firmware is filling the TX FIFO at right time you will not face any issue. If you are not sure then you can use software control using a different pin.

Thanks,

Hima

Used the "Transfer continuous" setting, and it worked after a bit of tuning. The option to duplicate the hardware size of the FIFOs by halving the size of words from 16 to 8 bits is also great, PSoC is now officially making my life easy

Thanks for your answer!

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