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I am working on a simple design that exposes the registers of an APB mapped peripheral located in a companion FPGA to FX3. My first instinct was to reconfigure the GPIF interface to generate native APB master to the FPGA. It seems like this would be a fairly common application, since many peripherals are available as AMBA compliant IPs. However, I can't seem to find any information or reference designs that do something similar. Is this problem already solved, or do I need to create some custom glue logic to connect the GPIF to an APB bus?
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Hi,
Currently we don't have any example for interfacing GPIF with APB peripheral device but you can implement APB protocols on GPIF SM.
Thanks & Regards
Abhinav Garg
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Hi,
Currently we don't have any example for interfacing GPIF with APB peripheral device but you can implement APB protocols on GPIF SM.
Thanks & Regards
Abhinav Garg