Upgrading from 2 to 4 MPI lanes

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We had the Sony IMX219 sensor working in a custom CX3 board. Until now, we were using 2 MIPI lanes, and everything worked just fine, the VGA resolution worked at 110FPS.

We want to use the 4 MIPI lanes now, so I kept the sensor PLL clock configuration, and on the CX3 side I just modified the "numDataLanes" parameter in the CyU3PMipicsiCfg_t variable.

CyU3PMipicsiCfg_t cfgUvcFullFOVx2Mipi4 =  {

CY_U3P_CSI_DF_RAW10,      /* dataFormat   */

4,                          /* numDataLanes */

1,                        /* pllPrd       */

82,                          /* pllFbd       */

CY_U3P_CSI_PLL_FRS_500_1000M, /* pllFrs      */

CY_U3P_CSI_PLL_CLK_DIV_8,    /* csiRxClkDiv  */

CY_U3P_CSI_PLL_CLK_DIV_8,    /* parClkDiv    */

0x00,                        /* mclkCtl      */

CY_U3P_CSI_PLL_CLK_DIV_8,    /* mClkRefDiv   */

1640,                        /* hResolution  */

00                        /* fifoDelay    */

};

If I understand correctly, the CSI RX LP-HS clock and the Output Parallel clock in the CX3 should be set to a value near its maximum for better results.

1. Is there anything else to modify that I'm not taking into consideration to use 4 MIPI lanes?

2. Should I change the CX3 clocks configuration? Why?

Thanks.

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19 Replies
KandlaguntaR_36
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25 solutions authored 10 solutions authored 5 solutions authored

Hello,

If you want to change to 4 MIPI lane from 2 lane, you need re-generate the MIPI configuration by setting 4 lane in MIPI configuration tool -> Image Sensor Configuration Tab. Adjust dividers and FIFO value in CX3 Receiver Configuration Tab so that there will be no error (Red color cross marks) in the tool.

You can not just change the number 2 in the already generated configuration (for 2 lane case) to 4.

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Hello,

Thanks for your answer. I tried using the tool again, as can be seen in the picture attached, but it still doesn't work.

I have checked with the oscilloscope the THS Zero and Prepare timing, and the MIPI clock lane frequency. I have set the H and V active and blank pixels on my sensor (IMX219).

As I said, this board and camera work with 2 MIPI lanes, but the tool you mention wasn't useful. I set the CSI RX LP-HS clock and the Output Parallel clock in the CX3 to a value near its maximum for better results, and modified the sensor PLL clocks to achieve the desired frame rate.

Maybe I have to modify something else?

Another issue I have seen when using 2 MIPI lanes is that I have to set the size in the glProbeCtrl variable to a value with 2 more rows. For example, for VGA resolution, instead of using 640x480x2, I have to set it to 640x482x2.

Until now, I have used the Sony IMX219 sensor with the CYUSB3065-BZX chip on a custom board (after testing everything on the Denebola kit), with 2 MIPI lanes. As I explained, the configuration was made by trial and error, since the tool you recommended didn't give good values.

Can you please help me?

Capture.PNG

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Hello,

In this picture there is the tool with the parameters that are working with 2 MIPI lanes, and the tool says it wouldn't work.

Capture.PNG

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Hello,

I have obtained the following settings as per your inputs. Can you please try the same?

Note that you need to pass the PHY DELAY of 11 using CyU3PMipicsiSetPhyTimeDelay API.

pastedImage_0.png

/* IMXSONY_RAW10_Resolution0 :  */

CyU3PMipicsiCfg_t IMXSONY_RAW10_Resolution0 = 

{

    CY_U3P_CSI_DF_RAW10,  /* CyU3PMipicsiDataFormat_t dataFormat */

    4,                          /* uint8_t numDataLanes */

    2, /* uint8_t pllPrd */

    149, /* uint16_t pllFbd */

    CY_U3P_CSI_PLL_FRS_63_125M,/* CyU3PMipicsiPllClkFrs_t pllFrs */ 

    CY_U3P_CSI_PLL_CLK_DIV_2, /* CyU3PMipicsiPllClkDiv_t csiRxClkDiv */

    CY_U3P_CSI_PLL_CLK_DIV_2, /* CyU3PMipicsiPllClkDiv_t parClkDiv */

    0,                 /* uint16_t mClkCtl */

    CY_U3P_CSI_PLL_CLK_DIV_2, /* CyU3PMipicsiPllClkDiv_t mClkRefDiv */

    1640,         /* uint16_t hResolution */

    0                         /* uint16_t fifoDelay */

};

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Hello,

Thanks, I didn't know I had to use the CyU3PMipicsiSetPhyTimeDelay API. Now i'm using it and it works.

But I can't get a higher FPS as the camera can output. The problem seems to be that the GPIF bus is 16-bits for the RAW10 format, so if I understand correctly the output limit is set by the Output Parallel Clock, which is 100MHz max, and with the 16-bits bus the total Gbps is 1.6.

Is there a way to use the 2.4Gbps with the RAW10 format? This way the limit would still be in the MIPI lanes, not the GPIF block.

If I set the GPIF bus to 24-bits, would it work?

Do I need to use a different format?

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Please select 24-bit output format in Image Sensor Parameters tab of MIPI Tool. At the same time, pass 24 bit parameter to GPIF Load API. This will set the MIPI output to 24-bit parallel format and set the GPiF to work at 24-bit parallel interface respectively.

P.S. Use the latest MIPI Tool provided with SDK 1.3.4.

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That doesn't work.

First of all, I need to modify the format sent to the PC via USB too to match the 24b format.

Second, if I configure the MIPI block to read RGB888 as stated by the MIPI Tool, bytes per line and pixel information are incorrect.

What's the correct way to do this?

I'm trying to use the camera in RAW8 and set the MIPI block to RGB888, so 24b are packed as a single pixel.

Also, I still have the problem that I have to set the probe control and frame descriptor to have 2 extra lines or it won't work. Why is this?

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If I set everything to work with RAW10 and 16 bits per pixel, it works, and the bytes received from the DMA are correct.

If I change the GPIF bus width from 16 to 24, it doesn't work, and the bytes received from the DMA are 0. I expect to see 1.5 times more bytes than before.

Similar thing happens with RAW8: when GPIF width is 8, I get X bytes. When GPIF width is 16, I get X*2 bytes. But when GPIF width is 24, I get 0 bytes.

Why is this not happening?

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Please refer the following thread - Streaming RAW8 or RAW10 using CX3

If you set the GPIF II to 24-bit and MIPI bridge to RGB888 out put format (the CX3 MIPI will convert the FIRST 24 serial bits into parallel 24 bits). It does not bother about the data sequence.

So, the GPIF will receive these first 24-bit in the RAW 10 format.

i.e First clock cycle - P1[9:2], P2[9:2], P3[9:2]

Second clock cycle -  P4[9:2], P1[1:0], P2[1:0], P3[1:0], P4[1:0]; P5[9:2]

Third clock cycle - continue

In this case, you have to modify the descriptors with the consideration of 10 bits per pixel and also calculate the frame format descriptors with 10 Bpp.

Note that you also need to modify the Probe Control Structures with the consideration of 10 bits per pixel.

Note that the horizontal line data length should be multiple of 3 bytes - for example, if 1920X 1080 is your resolution and RAW 10 is pixel length, then the horizontal line data length would be 1920x10 bits = 2400 bytes per lane. If the GPIF II is set to 24 -bits (3 bytes), one horizontal will be sampled in 2400 /3 = 800 clocks

If the horizontal line data length is 2398 bytes (for example), it still needs 800 clocks, but the last clock samples additional two bytes, which is not needed.

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Let me see if I understand everything correctly, with the following configuration the camera should be working:

  • Camera: RAW8, 4 MIPI lanes, output resolution 1640x1232
  • MIPI: output format RGB888, 4 MIPI lanes, hResolution=547 (1640/3)
  • GPIF: bus width 24 bits
  • Probe: size in bytes 1640x1232 = 2020480
  • UVC descriptor: 8 bits-per-pixel, 1640x1232

I will be trying this configuration soon, and will come back to you with the results. Please let me know if there is anything wrong.

Also, I would like to know why I have to set Probe Control and UVC descriptor to 1640x1234 instead of 1640x1232 (2 extra lines) with my current configurations.

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Please let me know what is your bits per pixel in 1640 x 1232 resolution.

Note that when you are using 24-bit parallel interface, the horizontal line size (horizontal resolution x bits per pixel) should be exact multiple of 24-bit. Otherwise, You may receive additional bits per a horizontal line.

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The camera outputs 8bpp since it's RAW8.

The additional bits per line that you talk about, are they important? or will they be omitted when sending the image through USB?

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They are not important and they will not omit when sending image through USB.
Please use the Latest MIPI tool provided with SDK 1.3.4 to generate the configuratio.

Else, provide the image sensor configuration parameters, I will get you the MIPI configuration parameters.

CSI Clock

Data Lane - 4 lane

THS Prepare

THS Zero

fps

H Active

H Blanking

V Active

V Blanking

Ideally, you do not need to add additional two rows 1234 instead 1232.

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CSI Clock: 480 MHz

Data Lane: 4 lane

THS Prepare: 60ns

THS Zero: 250ns

fps: 45

H Active: 1640 (1638 when I use the 24b GPIF bus)

H Blanking: 1808 (1810 when I use the 24b GPIF bus)

V Active: 1232

V Blanking: 50

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Please confirm whether you are able to stream with 4-MIPI lane.

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Right now I have this configuration which is not working:

Camera sends RAW8, 1638x1232.

MIPI block is set to output RGB888, hResolution is 546 (1638/3), and the clocks are used from the MIPI Configuration Tool.

GPIF bus is set to 24b ( status = CyU3PMipicsiGpifLoad(CY_U3P_MIPICSI_BUS_24, 0x5FF0) )

Probe Control frame size is 1638x1234 Bytes.

UVC descriptor is set to 819x1234, 16bpp, RGB565 (same amount of bytes than 1638x1234).

I know the camera is working, the problem seems to be setting the GPIF bus to 24b, because to debug I am sending through a serial port the amount of bytes sent by the GPIF through the DMA, and it's 0.

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Sorry to bother again. In my last response I listed the configuration used on the camera and CX3, which based on your comments should work, but it is not. Can you please help me?

I also tried a different configuration with only 16 bits but packing them differently:

Camera: RAW8, 1638x1232

MIPI Block: RGB565_2, 819 hResolution

GPIF: 16 bits

Probe Control: 1638x1234 B

UVC: 819x1234, 16bpp

This is not working either. Do you have an idea why?

Thanks.

P.D.: I have been trying and it looks like the "hResolution" parameter in the MIPI configuration structure is not being used, or at least is not important, because I used random values and the camera still works. Is this normal?

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I have been investigating and managed to make this configuration work:

Camera: RAW8, 1638x1232

MIPI Block: RGB565_2, 819 hResolution

GPIF: 16 bits

Probe Control: 1638x1234 B

UVC: 819x1234, 16bpp

The idea is for the GPIF to receive 2 bytes in every cycle, and then send the information to the PC with 2 bytes per "pixel", so we get a picture with half the columns.

The next step would be to make something similar, but with a 24b GPIF bus, so 3 bytes are sent to the GPIF block every cycle. The UVC and Probe Control don't need to be modified if I understand correctly. MIPI block should be set to RGB888 and 546 hResolution, and GPIF to 24b. The whole configuration is shown below:

Camera: RAW8, 1638x1232

MIPI Block: RGB888, 546 hResolution

GPIF: 24 bits

Probe Control: 1638x1234 B

UVC: 819x1234, 16bpp

But when I set the GPIF bus to 24b it doesn't work. I even changed the second parameter of CyU3PMipicsiGpifLoad to 0x5FD0 so it is multiple of 3, as specified in the CX3 TRM.

The information input into the Cypress MIPI Configuration Tool is:

THS-Prepare: 60

THS-Zero: 250

Input video format: RAW8

Output video format: 24-bit

Data lanes: 4

CSI Clock: 480MHz

H-Active: 1638

H-Blanking: 1810

V-Active: 1232

V-Blanking: 50

Frame rate: 45

This tool confirms that the configuration of the MIPI block is correct:

CyU3PMipicsiCfg_t cfgUvcFullFOVx2Mipi4Raw8 =  {

CY_U3P_CSI_DF_RGB888,      /* dataFormat   */

4,                          /* numDataLanes */

1,                        /* pllPrd       */

82,                          /* pllFbd       */

CY_U3P_CSI_PLL_FRS_500_1000M, /* pllFrs       */

CY_U3P_CSI_PLL_CLK_DIV_8,    /* csiRxClkDiv  */

CY_U3P_CSI_PLL_CLK_DIV_8,    /* parClkDiv    */

0,                        /* mclkCtl      */

CY_U3P_CSI_PLL_CLK_DIV_2,    /* mClkRefDiv   */

546,                        /* hResolution  */

0                        /* fifoDelay    */

};

Is there something wrong or something I need to take into consideration?

How can I make it work with 24 bits?

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Please try with either 16-bit or 24-bit at a time and ensure it works well for one of them. No need to try both.

It is good to go with 16-bit parallel interface, since the 24-bit interface has a constaint - line size should be 24-bit multiple constraint.

As per your Image Sensor settings, the MIPI Configuration for 16-bit parallel output would be as follows:

CyU3PMipicsiCfg_t null_RAW8_Resolution0 = 

{

    CY_U3P_CSI_DF_YUV422_8_2,  /* CyU3PMipicsiDataFormat_t dataFormat */

    4,                          /* uint8_t numDataLanes */

    2, /* uint8_t pllPrd */

    123, /* uint16_t pllFbd */

    CY_U3P_CSI_PLL_FRS_250_500M, /* CyU3PMipicsiPllClkFrs_t pllFrs */ 

    CY_U3P_CSI_PLL_CLK_DIV_4, /* CyU3PMipicsiPllClkDiv_t csiRxClkDiv */

    CY_U3P_CSI_PLL_CLK_DIV_4, /* CyU3PMipicsiPllClkDiv_t parClkDiv */

    0,                 /* uint16_t mClkCtl */

    CY_U3P_CSI_PLL_CLK_DIV_2, /* CyU3PMipicsiPllClkDiv_t mClkRefDiv */

    1640,         /* uint16_t hResolution */

    0                         /* uint16_t fifoDelay */

};

Please probe HSYNC and VSYNC test pins and measure the Active and Blanking time.

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