Unable to boot from NAND S34ML02G200TFI003

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kadoc_4020831
Level 1
Level 1

I am using S34ML02G200TFI003 NAND 2Gb flash in my linux base application. In some of products I am not able to boot the system from NAND. I am getting message of data abort from NAND. While replacing NAND with other working product - it starts boot (product ok). Can you please help me out to find the cause and solution. The logs of uboot spl is as below;

Booting from nand ...

data abort

pc : [<8ffb6812>]          lr : [<8ffb5b79>]

reloc pc : [<8081e812>]    lr : [<8081db79>]

sp : 8ef876b0  ip : 00000000     fp : 00000021

r10: 0001f000  r9 : 8ef87ee0     r8 : 00000000

r7 : 00000060  r6 : 0001f000     r5 : 8ef8f580  r4 : 8f039b00

r3 : 00000000  r2 : 0000005e     r1 : 8ef8f7f8  r0 : 00000000

Flags: nZCv  IRQs off  FIQs on  Mode SVC_32

Resetting CPU ...

resetting ...

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7 Replies
BacemD_61
Employee
Employee
50 replies posted 50 sign-ins 25 replies posted

Hello,

Please note that the S34ML-2 NAND flash requires 4-bit ECC error correction.

You need to configure this properly in u-boot otherwise you'll get a lot of read errors and this might be the origin of this data abort issue.

Best regards,

Bacem

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Thanks for your prompt response.

We have implemented ECC scheme which is incorporated in TI bootloader;

(OMAP_ECC_BCH8_CODE_HW)

http://processors.wiki.ti.com/index.php/Linux_Core_NAND_User%27s_Guide

While reading the partcular addresses from NAND (where linux image store) it is giving data abort message. Particularly in case of bit flipping or code correction it will correct bit/bits but should not give data abort message, correct if i am wrong.

Thanks & Regards

Kalpesh

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Hello,

The image which you generate and which you program into the NAND Flash needs to be generated using the BCH8 algorithm and the ECC codes need to be programmed into the location where the TI controller is expecting them to be located. They are located i nthe spare area but the locations (ECC codes program and read locations) need to match otherwise the ECC correction won't work.

Could you try simple raw NAND read operations before using the NAND for booting?

That way we would know whether it's an ECC issue or not.

Best regards,

Bacem

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Thanks,

I have tried reading raw NAND read operations before booting but couldn't get success. Please help, any action further.

Thanks & Regards

Kalpesh

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Did you get wrong data when reading?

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I have tried read address 8ffb6812 (based on below logs and resetting occur) but system get hang; can you please elaborate how I can know whether it's an ECC issue or not?

Logs during resetting occur (normal boot up sequence) - as below;

Booting from nand ...

data abort

pc : [<8ffb6812>]          lr : [<8ffb5b79>]

reloc pc : [<8081e812>]    lr : [<8081db79>]

sp : 8ef876b0  ip : 00000000     fp : 00000021

r10: 0001f000  r9 : 8ef87ee0     r8 : 00000000

r7 : 00000060  r6 : 0001f000     r5 : 8ef8f580  r4 : 8f039b00

r3 : 00000000  r2 : 0000005e     r1 : 8ef8f7f8  r0 : 00000000

Flags: nZCv  IRQs off  FIQs on  Mode SVC_32

Resetting CPU ...

resetting ...

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Hello,

The aplication code is being copied from NAND to RAM during boot up and the address you see there for the PC is an address in RAM.

What I was asking for is that you manage to find a way to run simple raw read tests before the error occurs.

Maybe you could stop at the u-boot stage and run the raw read tests from the u-boot command line.

You may also add more debug messages into the NAND driver where the ECC correction is taking place.

You could also enable the debug mode to get more elaborated debug messages.

Best regards,

Bacem

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