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1. Re: Failure of S29GL128P10TFI01 parallel NOR flash
AlbertB_56 Dec 4, 2018 10:39 AM (in response to huqic_3861581)Hello Qiaopeng,
There may be the possibility that this specific issue may be related to a timing-violation issue.
1). Please provide waveform of VCC and VI/O during power up.
2). Ensure a 0.1uF capacitor is placed between VCC and GND
pins, but place the capacitor as close to the VCC pin, as possible.
3). The RY/BY# output pin is "open drain". Therefore, the RY/BY#
can remain unconnected without any consequence.
4). Is the S29GL128P10TFI01 been already programmed
with the correct data pattern?
5). Do not use any of the "DNU" (Do Not Use) pin.
Best regards
Albert
Cypress Semiconductor
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2. Re: Failure of S29GL128P10TFI01 parallel NOR flash
huqic_3861581 Dec 4, 2018 10:52 PM (in response to AlbertB_56)Hello Albert,
Thank you very much for your wonderful answer, but I have another questions to ask.
Sum up. Faulty flash chip surface label are S29GL128P10TF101 706FF309C @05 SPANSION and S29GL128P10TF101
722FF163C @05 SPANSION, and the total number is 18pcs. Have you ever received any feedback about the problems in these two batches before? Or is there a problem with these two batches in the production process?
Below picture one is the power-on waveform of VIO and VCC. Below picture two is the power-down waveform of VIO and VCC. VCC and VIO are connected together. The voltage amplitude is 3.3V. Thank you !
Best regards,
Qiaopeng Hu
Accelink company, China
picture 1
picture 2
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3. Re: Failure of S29GL128P10TFI01 parallel NOR flash
AlbertB_56 Dec 6, 2018 11:56 AM (in response to huqic_3861581)Hello Qiaopeng,
The VI/O and VCC rise and fall waveforms look okay.
Please ensure a 0.1uF capacitor is placed between VCC and GND pins, but place the capacitor
as close to the VCC pin, as possible. The RY/BY# output pin is "open drain". Therefore, the
RY/BY#can remain unconnected without any consequence. Is the S29GL128P10TFI01
already been programmed with the correct pattern before assembly?
Lastly, please do not conect any "DNU" (Do Not Use) pins to the PC board circuitry.
Best regards,
Albert
Cypress Semiconductor
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4. Re: Failure of S29GL128P10TFI01 parallel NOR flash
huqic_3861581 Dec 10, 2018 3:25 AM (in response to AlbertB_56)Hello Albert,
If the programmer voltage of S29GL128P10TF101 chip is 3.0V, will it cause errors in data burned into FLASH or damage to FLASH? Thank you.
Best regards,
Qiaopeng Hu
Accelink company, China
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5. Re: Failure of S29GL128P10TFI01 parallel NOR flash
AlbertB_56 Dec 10, 2018 8:39 AM (in response to huqic_3861581)Hello Qiaopeng,
The S29GL128P has a VCC core voltage range from 2.7V to 3.6V. Therefore, if the Universal FLASH programmer
is providing a VCC core voltage of 3.0V. The input control signals, as well as the I/O's will tolerate and output 3.0V,
respectively.
Hope this helps...
Best regards.
Albert
Cypress Semiconductor
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6. Re: Failure of S29GL128P10TFI01 parallel NOR flash
huqic_3861581 Dec 10, 2018 7:39 PM (in response to AlbertB_56)Hello Albert,
I mean, when I burn chips, I use 3.0V power supply. After the chip is burned, I use 3.3V power supply . Will it affect the chip?
Best regards,
Qiaopeng Hu
Accelink company, China
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7. Re: Failure of S29GL128P10TFI01 parallel NOR flash
RoyL_01Jan 10, 2019 11:59 PM (in response to huqic_3861581)
"when I burn chips, I use 3.0V power supply. After the chip is burned, I use 3.3V power supply . " this is no problem.