molinac5,
The WaveDAC is essentially a VDAC8 component with DMA support. It is possible to read VDAC8 data back from the destination pointer VDAC8_Data_PTR. See the VDAC8_SetValue() API implementation. But....
From your description of the project I assume that the goal is to adjust the amplitude of the second sine wave to match the reference signal, assuming that both waves have same frequency, phase, shape and offset (correct me if I am wrong). This can be done differently simply by reading analog values from DAC_1 and DAC_2 by sequential SAR_ADC and processing data in code. The 60Hz wave is slow enough to do it by PSoC CPU. To further simplify the task, you can sample amplitude value only at the peak/valley of the reference and synthesized waves. For that you would need to lock on the reference wave phase and derive a quadrature signal for ADC. This can be easily accomplished in PSoC using Phase Locked Loop (PLL), which will produce both sync and high-frequency sampling clock for WaveDAC_2
custom Phase-Locked Loop (PLL) implementation using PSoC5
Note that on your schematic all information about the amplitude difference is being lost as soon it goes through comparator. At this point the PID control is no longer applicable (at least the traditional one), as PID require knowledge of signal deviation (V1-V2) for further processing. Since you have only 1-bit digital info available from the comparator (>,<), the PID will never settle (this is like a cheap house thermostat with on/off action, which either overshoots or undersoots the set temperature, but never stay on target).
There are other methods for 1-bit digital control, e.g. fuzzy logic or "take-back-half", which don't give same accuracy and speed as PID.
https://www.edn.com/design/sensors/4460914/Generate-proportional-feedback-from-a-bang-bang-sensor-wi...
/odissey1
