CX3 using OV5647 no video capture

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ScGr_289066
Level 5
Level 5
100 replies posted 50 replies posted 25 replies posted

Hi All,

We have been designing a USB3 interface for the OV5647 sensor using the CX3.  We've been using e-cam (from e-con systems) to display video and perform captures, but have also tried VLC Media player with similar results.

I started with e-con systems SDK example and replaced their sensor library with my own code that interfaces with the Omnivision OV5647 sensor.  After much searching I have found initialization data that gets the sensor into streaming mode outputting MIPI data at resolutions and frame rates that match the RDK.  Numerous debug probes have shown that the CX3 is accepting incoming MIPI data from the sensor via DMA and delivering it to the USB3 interface without errors or timeouts using the CyUv3DebugPrint function to diagnose what the firmware is doing.

The problem is e-cam is not capturing any video data and always shows a frame rate of 0.  If I attempt a image capture, e-cam displays "capturing image..." in its status bar, but never outputs an image or erases the message.  I do however see internal events: "still capture starting", "skipping three still images", and "capture complete events".

I've examined the PHY signals between the sensor and CX3.  They look reasonable.

This all leaves me confused as to why e-cam isn't getting video to display.  Any comments where to look are much appreciated.

Scott

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1 Solution

Hi Scott,

The API CyU3PMipicsiSetPhyTimeDelay is used to adjust the paramter named Ths_settle which is defined in physical layer of MIPI spec. The value will be written into one register of CX3.

BaiduShurufa_2018-12-5_9-27-15.bmp

Check the D-PHY spec v1.0/1.1/1.2 for the detailed information if you are interested in it.

Two parameters, Ths_prepare and Ths_zero, are related to Ths_settle. Ths_prepare is 70 and Ths_zero is 90 in default as you could see in configuration tool.

Also CX3 holds a defalut value of Ths_settle. However, the default value will not work for all sensors since Ths_zero and Ths_prepare will be different. That is the reason why I ask you to adjust it using CyU3PMipicsiSetPhyTimeDelay.

I suspect that you have not set the correct value of Ths_settle(or maybe some other paramters are incorrect). However, at the first, I am going to confirm if the senosr outputs the expected signals.

Please measure the MIPI clock+/- pin and data pin(D0+/-, D1+/D-) and upload the screenshot.

View solution in original post

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12 Replies
YangyangC_06
Employee
Employee
750 replies posted 500 replies posted 250 replies posted

Hi Scott,

Looks like you have solved the problem that the registers are abnormal(in you previous post). From the descriptor, you are able to see the output from image sensor.

Could you please

1. Upload the waveform of MIPI signals, i.e., MIPI clock+/clock-, data lane0+/lane0-,...,data lane N+/-

2. Upload the waveforms of Hsync,Vsync,PCLK on CX3? These are three important signals.

Of course, you need to measure the signals below after you run E-cam to try to get video stream.

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Hi yyca,


Yes, finally found the correct initialization data (by getting NDAs in place).


As you suggested I captured the three key test point waveforms: PCLK, VSYNC and HSYNC.  PCLK and VSYNC look as I expect.  HSYNC is quite odd.  Here are the waveforms.  The HSYNC waveform (blue) is a single-shot capture not an overwritten waveform.

hsync.png

all.png


pclk.png

HSYNC strikes me as being very odd and random.  What is your take on it?

PCLK is 75 MHz, and I probed it using the local spring clip ground using a 250 MHz probe on a 350 MHz, 4 GS/s scope.  It is a lot more rounded than I'd expect.  What are your thoughts?

Thanks,

Scott



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Hi Scott,

I edit your waveform screenshot as below.  The blue signal should be the PCLK instead of Hsync after a quick view of the second picture.

BaiduShurufa_2018-11-29_11-1-48.bmp

As for the third screenshot, is it the zoom in of Vsync when it is HIGH?

The expected signals should be same to below

scope_3.png

where the yellow one is PCLK, green one is Vsync and the blue one is Hsync.

The zoom in of PCLK is shown below.

scope_2(PCLK).png

It is 97M Hz as expected.

Zoom in of Hsync

scope_5(H_active).png

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Thanks for the HSYNC waveform.  Clearly that's my issue.  Any thoughts on why this one signal can be corrupted, or what is happening? It seems to me these errant waveforms can only be produced by incorrect image sensor programming?  Does that make sense to you too?

Thanks,

Scott

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Hi Scott,

Could you please upload screenshot of Image sensor configuration and CX3 receiver configuration tab in .cycx file?

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Hi yyaa,

Sorry for the confusion in the .  I had swapped scope probes to measure PCLK in the last trace shown in yellow.  The initial trace I showed in blue is indeed HSYNC, even though subsequent blue traces are PCLK.

In the original design, we'd used the cycx file associated with the e-con systems OV5640 RDK board (YUY2 output).  Since then we realized that the sensor we're using only outputs RGB888, so we have created our own cycx file which is shown below:

pastedImage_1.png

pastedImage_2.png

Thanks for your help.

Scott

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The configuration values looks fine.

Please try to modify the case branch in CyCx3UvcAppImageSensorSetVideoResolution as following codes .After that, please measure Hsync/Vsync/PCLK again.

case 0x01:

/* Write 5MPSettings */

#ifndef FX3_STREAMING

status = CyU3PMipicsiSetIntfParams (&OV5647_RGB24_5MP, CyFalse);

if (status != CY_U3P_SUCCESS)

{

CyU3PDebugPrint (4, "\n\rUSBStpCB:SetIntfParams SS1 Err = 0x%x", status);

}

status = CyU3PMipicsiSetPhyTimeDelay(1,0x0b);

CyU3PDebugPrint(4,"\r\n Set Phy delay time %d",status);

#endif

CyCx3_ImageSensor_Set_5MP ();

break;

}

break;

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Hi yyca,

I added the delay but the function, CyU3PMipiSetPhyTimeDelay() is undefined.  A search of the project doesn't find a definition.  Where does this function reside?

Thanks,

Scott

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never mind, I see I spelled it wrong.

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I added the delay, but can't get VLC player to reliably connect with the system.

Every once in a while, say one in five or 10 trys, VLC player does appear to be running (its time display counts), but the display is always black.  When VLC doesn't start, only PCLK runs, neither HSYNC or VSYNC runs.  During that one in 10 try when VLC appears to run, we get reasonable signals for all three PCLK (95.5 MHz), HSYNC (39 KHz) and VSYNC (19 fps).

Thanks,

Scott

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Hi Scott,

The API CyU3PMipicsiSetPhyTimeDelay is used to adjust the paramter named Ths_settle which is defined in physical layer of MIPI spec. The value will be written into one register of CX3.

BaiduShurufa_2018-12-5_9-27-15.bmp

Check the D-PHY spec v1.0/1.1/1.2 for the detailed information if you are interested in it.

Two parameters, Ths_prepare and Ths_zero, are related to Ths_settle. Ths_prepare is 70 and Ths_zero is 90 in default as you could see in configuration tool.

Also CX3 holds a defalut value of Ths_settle. However, the default value will not work for all sensors since Ths_zero and Ths_prepare will be different. That is the reason why I ask you to adjust it using CyU3PMipicsiSetPhyTimeDelay.

I suspect that you have not set the correct value of Ths_settle(or maybe some other paramters are incorrect). However, at the first, I am going to confirm if the senosr outputs the expected signals.

Please measure the MIPI clock+/- pin and data pin(D0+/-, D1+/D-) and upload the screenshot.

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Hi Scott,

Do you solve the problem?

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