2 Replies Latest reply on Nov 27, 2018 9:59 PM by ThM_3776866

    GPIF inteanal clock frequecy setting


      Hi All,

      I am working cypress FX3. I changed clock setting in GPIF designer to internal clock but I am getting 190MHz of frequency. How to set Clock internal Frequency range?.

        • 1. Re: GPIF inteanal clock frequecy setting



          The default clock values for the PIB block would be set to SYS_CLK/2, which would be 192MHz in case the SYS_CLK is 384MHz. To override this, modify the divider value in the CyU3PPibClock_t structure. Please use the following structure as parameter to the CyU3PPibInit() API.

              pibClock.clkDiv = 4;          // Clock divider is set to 4.

                                            //Modify this value to generate different clock frequencies

              pibClock.clkSrc = CY_U3P_SYS_CLK; // Clock frequency is derived from the SYS_CLK

              pibClock.isHalfDiv = CyFalse;

              /* Disable DLL for sync GPIF */

              pibClock.isDllEnable = CyFalse;


          The above structure will generate a clock frequency of 100.8MHz (maximum supported on the GPIF II interface) if the SYS_CLK frequency is chosen to 403.2MHz.


          Best regards,

          Srinath S