FX2LP Code Banking

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Anonymous
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Hello

Has anyone implemented code banking on an FX2LP?

I am very short of code space on my current design and was considering a spin of the hardware to increase codespace by implementing code banking.

I would rather do this than switch to a new processor due to time constraints.

I currently boot from a 64k i2C eeprom (0xC2 first byte) & run from external ram.

I have looked through AN58170 "Extending FX1/ FX2LP Code Memory Using Code Banking" and understand the theory of splitting the code in multiple banks. I am however concerned at the lack of information on how to generate the programming files for a code banked design and how to actually boot the code from eeprom?

Any advice would be appreciated.

Regards

Dave

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YiZ_31
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Hi Dave,

The chapter 3 of AN58170 has described a step by step method of developing the code bank firmware. And you can also download the relating firmware and host application from the same page.

http://www.cypress.com/documentation/application-notes/an58170-codememory-banking-using-ez-usb

Is there anything unclear in the application note? We are glad to help you!

And the FX2LP has a default bootloader sequence. It's described in Chapter 1.1 of AN50963

http://www.cypress.com/file/43391/download

Regards,

Eddie

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Anonymous
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Hi Eddie

Thanks for the reply, I would appreciate some help with this thanks.

I managed to find my old CY3684/3674 Advanced Development Board and am attempting to run some code banked firmware.

I have added a wire to the board to connect U3.32 (RAMA16) to connector P6.13 (PE6) to allow access to the upper and lower sections of the ram.

I have followed the instructions in App Note an58170 and built the example firmware (code banking firmware.Uv2).

I have added some instructions to toggle i/o pins to help with debug but apart from that the code is as per the example.

I downloaded the HEX file using CyConsole and the code executes - the board identifies as a "Cypress EZ-USB Example Device" in device manager.

I can communicate with the board using CyConsole and read back the "bank and function information" using Vendor Commands with requests 0xA6 to 0xAB.

The i/o pins that I defined toggle at 52 kHz.

The returned "bank and function information" is always from Bank 1 (Return values 0x11 or 0x12) even when a request for Bank 0 is sent.

This is not a huge surprise to me as it is stated in the application note that CyConsole does not support code banking.

I then used hex2bix to generate an iic file for programming the large eeprom on the development board.

c:\cypress\usb\bin\hex2bix -R -I -C 0x41 -F 0xC2 -M 32000 -O Banker.iic Banker.hex

I downloaded this file to the eeprom using fxEEPROM.exe (from the CyApi directory).

I then power cycled the board to run the application from eeprom.

The board now identifies as "unknown device" and the i/o pins toggles at a lower frequency of 15kHz.

The code appears to be executing but there is obviously some issue with it and I can't communicate with the board.

Questions:

Does the method that I followed seen reasonable or are there any obvious mistakes or missed steps?

There is another project called "Code banker.Uv2" in the examples directory which seems to control access to the code banks, do I need any of this code in project?

I intend to use banked firmware for designs greater than 64k in size.

Can I generate an iic file and store this in an eeprom of 128k size and boot from this?

Regards

Dave

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YiZ_31
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Hi Dave,

All your steps looks reasonable. As far as I concern, the code bank project may not contain the communication part, so you cannot communicate with it.

Theoretically, the firmware size can not be more than 112KB due to the bank area value. So I do not recommend you do a 128k size eeprom.

Regards,

Eddie

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Anonymous
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Hi Eddie

The code that I am trying to load from eeprom is the same code that was running OK when downloaded directly to ram so I would expect the performance to be the same.

The only difference is that I have now generated an iic file (with bootloader included) and programmed this into the eeprom.

The board now identifies as "unknown device" so something is not right but I am struggling to find what the issue is.

Regards

Dave

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Anonymous
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Progress update.

I manged to download the supplied example "code banking firmware.hex" using the command line utility "code banking.exe".

This runs as expected and vendor_requests 0xA6 to 0xAB return the correct values, address pin A16 on the ram chip toggles according to the code bank being accessed.

Vend Req = 0xA6 : Return = 0x01                  (CodeBank 0 - A16 pin is low while PSEN active)

Vend Req = 0xA7 : Return = 0x02                  (CodeBank 0 - A16 pin is low while PSEN active))

Vend Req = 0xA8 : Return = 0x11 or 0x12      (CodeBank 0 - A16 pin is low followed by CodeBank 1 - A16 pin is high while PSEN active))

Vend Req = 0xA9 : Return = 0x11                   (CodeBank 1 - A16 pin is high while PSEN active))

Vend Req = 0xAA : Return = 0x12                   (CodeBank 1 - A16 pin is high while PSEN active))

Vend Req = 0xAB : Return = 0x01 or 0x02      (CodeBank 1 - A16 pin is high followed by CodeBank 0 - A16 pin is high while PSEN active))

Then, following the instructions in AN58170 I built the example code myself.

I expected to generate a hex file identical to the one contained in the zip file but this was not the case.

The size of resultant hex file is 20kB compared to the original which is 13kB.

I downloaded the newly built hex file using "code banking.exe" but this code does not perform as expected.

The Vend Req always returns either 0x11 or 0x12

The A16 and PSEN signals are similar to before except for a Vend req of 0xA8 where the A16 pin remains low while PSEN is active.

I'm struggling for ideas now so any advice would be appreciated.

If anyone from Cypress Tech Support is reading this could you please confirm that the "code banking firmware.hex" file which is included with the download AN58170-1.zip was generated from the source files in the "Firmware" folder.

Dave

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YiZ_31
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Hi Dave,

I rebuilt the project and the generated hex file is 13kB.

To be mentioned, I used uVision 5.

Regards,

Yi

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Anonymous
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Hi Yi

It's uVision3 that I'm using.

Do you know if there is any reason why the project wouldn't build correctly in uVision3 or if there are any settings that need to be changed?

Our Keil support lapsed a long time ago so I updating to uVision 5 would require a substantial financial outlay (I would imagine).

Regards

Dave

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YiZ_31
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Hi Dave,

I just use the evaluation version (which you can get by filling a form of name, e-mail, company and such things)of uVersion 5 without any modification on settings.

Regards,

Yi

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Anonymous
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Hi Yi,

I downloaded the evaluation version of uVision5 but the code space limit was breached, the build output is pasted below.

Could you post the "build output" that you generated so that I can compare them?

Regards

Dave

Rebuild target 'Target 1'

compiling fw.c...

assembling dscr.a51...

assembling L51_BANK.A51...

compiling common area.c...

compiling c_bank_0.c...

compiling c_bank_1.c...

linking...

LX51 LINKER/LOCATER V4.66.93.0 - SN: Eval Version

COPYRIGHT ARM Germany GmbH 1995 - 2018

@CODEBA~1.LNP COMMON {"fw.obj"},

COMMON {"dscr.obj"},

COMMON {"L51_BANK.obj"},

COMMON {"common area.obj"},

COMMON {".\EZUSB.LIB"},

COMMON {".\USBJmpTb.OBJ"},

BANK0 {"c_bank_0.obj"},

BANK1 {"c_bank_1.obj"}

TO "code banking firmware"

BankArea (0x004000, 0x004FFF)

CLASSES (CODE (C:0x80-C:0x3FFF), CONST (C:0x80-C:0x3FFF),

ECODE (C:0x80-C:0x3FFF), HCONST (C:0x80-C:0x3FFF))

******************************************************************************

* RESTRICTED VERSION WITH 0800H BYTE CODE SIZE LIMIT; USED: 080EH BYTE (100%) *

******************************************************************************

Program Size: data=43.5 xdata=4473 const=10 code=2355

*** ERROR L250: CODE SIZE LIMIT IN RESTRICTED VERSION EXCEEDED

    LIMIT:   0800H BYTES

Target not created.

Build Time Elapsed:  00:00:01

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YiZ_31
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Hi Dave,

Here is the build log:

Rebuild target 'Target 1'

compiling fw.c...

assembling dscr.a51...

assembling L51_BANK.A51...

compiling common area.c...

compiling c_bank_0.c...

compiling c_bank_1.c...

linking...

Program Size: data=43.5 xdata=4473 const=10 code=2348

creating hex file from "code banking firmware"...

"code banking firmware" - 0 Error(s), 0 Warning(s).

Build Time Elapsed:  00:00:01

Regards,

Eddie

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Anonymous
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Hi Eddie

I get the same build log as you.

I don't generate a 13kB hex file however, I get a 20kB hex file.

When I run this on the development board it does not behave as expected (details in earlier post).

pastedImage_0.png

The hex file supplied along with the example code is 13kB

When I run this code it works as expected.

pastedImage_1.png

Regards

Dave

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YiZ_31
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Hi Dave,

I'm going to lock thread. You can build a new thread if you have some updates.

Regards,

Eddie

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Anonymous
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Hi

How would I boot a code banked design of greater than 64k from eeprom if the maximum eeprom size supported is 64k?

Regards

Dave

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YiZ_31
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Hi Dave,

Today I found out that I got the same error of exceeding code size limiting. I don't know why can I compile at the first time. I will look for a computer with authorized uVision and reply to you later.

Regrads,

Eddie.

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