4 Replies Latest reply on Oct 17, 2018 2:36 AM by derrick.alabi_3331736

    Does the PSOC 6 support level-triggered external interrupts?

    derrick.alabi_3331736

      I know that the NVIC supports level-triggered interrupts, but from what I can tell GPIO pins can only trigger interrupts using one or both edges. When I connect the pin directly to the interrupt block, the interrupt never fires, but if I use the Global Signal block to get the port interrupt and configure the interrupt edge in the pin, then the interrupt fires. I am also not able to set input sync for that pin. PSOC Creator says that it is unsupported.

        • 1. Re: Does the PSOC 6 support level-triggered external interrupts?
          gani

          Hi,

           

          PSoC 6 Supports Level-triggered interrupts. Please refer Interrupts section in page 47 of the PSoC 63 BLE device architecture TRM obtained from the link below.

           

          http://www.cypress.com/file/385621/download

           

          Also please go through the code example "GPIO Interrupt" in the code examples section in PSoC Creator 4.2 . The code example also shows that you have to use Global Signal and port interrupt instead of pin interrupt.

           

          Thanks

          Ganesh

          • 2. Re: Does the PSOC 6 support level-triggered external interrupts?
            derrick.alabi_3331736

            The question that I am asking is: does PSoC 6 support level-triggered interrupts where the external source maintains a certain level when it needs to be serviced? I am already using the Global Signal block and port interrupt and that does not work. I have looked at the TRM many times as well as run many experiments, but I will check once more.

             

            I assume that the example you are referring to is CE219521. I have already looked at that, but you can see on page 4 of the associated PDF that it says "The switch when pressed results in logic 0 and provides a falling-edge signal". I am dealing with an external signal that will not generate an edge every time it needs to be serviced. It must be serviced as long as it is logic 0. From my understanding from the example, the falling-edge generates a signal and this signal is the one that is sampled by the NVIC for generating interrupts, which does not satisfy my case.

            • 3. Re: Does the PSOC 6 support level-triggered external interrupts?
              msur

              Hello derrick.alabi_3331736,

               

              The GPIO interrupt does not support level sensitive interrupts. However, you can use the DSI and UDB to convert the GPIO signal into a level sensitive interrupt. This approach has a downside that the interrupt is not deep sleep wake up capable. I haven't tested it but theoretically this should work Let me know if you face any issues with this. Note that the level is by default '1'. If you need '0', then place a NOT gate before the interrupt.

               

               

              Regards,

              Meenakshi Sundaram R

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              • 4. Re: Does the PSOC 6 support level-triggered external interrupts?
                derrick.alabi_3331736

                Yes, it does work! Thank you! I think I previously tried this in the larger project and it wasn't working, but I tested it in a fresh project on the development board and it works. There must be a problem with the other hardware or something in the software project.