I am working with the charge through reference design and attempting to base a product design on it. For development I have had the PCB assembled and have worked out the hardware issues, and now working on software issues.
I am providing links to the other discussions related to this topic.
The following is a link to the reference design being talked about.
I have been struggling with the software end for over a week and would like some assistance with the CCG2 programming.
Which sample code was used for the reference design? I am assuming it was fully tested at Cypress before the reference design files were released.
The closest example I can find to match this reference design is the following two sample code…
The CCG3 appears to work correctly, but, I am having trouble with the CCG2 firmware. Specifically I am going to list the issues I am having.
+ The notebook example has DP source enabled
+ attempting to disable it by changing usbpd_config.h
+ changing this line #define DISPLAY_PORT_SNK_CONFIGURATION (DISPLAY_PORT_SNK_SUPPORTED)
+ change to #define DISPLAY_PORT_SNK_CONFIGURATION (DISPLAY_PORT_SNK_NOT_SUPPORTED)
+ this results in several linker errors and I do not know how to resolve these…
+ I don’t know where the code is located that I need to remove related to DP
+ I can locate a type_c_manager.h, but not a type_c_manager.c
+ ERROR: L6218E: Undefined symbol dp_source_deinit (referred from type_c_manager.o).
+ ERROR: L6218E: Undefined symbol dp_source_init (referred from type_c_manager.o).
+ ERROR: L6218E: Undefined symbol get_dp_state (referred from usbpd_hpi.o).
+ ERROR: L6218E: Undefined symbol update_dp_config (referred from usbpd_hpi.o).
+ Next, the PDO data from the charger plugged into the CCG2 port (UFP?) is supposed to be relayed to the CCG3 by means of HPI
+ There should be an interrupt triggered from the CCG2, but I don’t believe this is being triggered.
+ I believe this logic is not in the CCG2 notebook example.
+ Next I would like to change the logic of the CCG2 to act as a UFP only.
+ As it is now it acts as a DFP since it is from the notebook example
+ This is the only starting point I can find for this CCG 2122 part, and would like to alter the logic to fit the proper role.
+ Finally, I am a little confused with the best configuration of the jumper positions.
+ The jumpers I am mostly confused with are
+ J1, it connects VSYS to either 3V3, 5V0, or the CCG3 programming VTarg pin
+ J19 connects pull up resistors for system_i2c to either VSYS or CCG3_VDD
+ J18 connects pull up resistors for CCG3_NB_I2C to either CCG_VDD or VSYS
A response from someone familiar with the charge through reference design would be appreciated.
Also, some assistance with altering the CCG2 code to remove the DP components and enable the HPI communication between the CCG2 and CCG3 would be greatly appreciated.