PSOC Creator 4.2 synthesis optimization control

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MaLe_2452796
Level 1
Level 1

Hi,

I have a design in PSoC Creator 4.2 (using PSoC5lp device) where I  need to switch off the synthesis optimization  of some digital blocks while keeping other optimized (a rare case where I need to preserve a delay adjustment).

If I disable the optimization in “Projects->Build Setting-> Synthesis-> Synthesis Optimization Effort -> None “ and switch on

the optimization per block using the directive in the .ctl file as, for example :

ATTRIBUTE opt_level OF my_module_1 : module is 2 ;

ATTRIBUTE opt_level OF my_module_2 : module is 0 ;

it obeys my settings (my_module_1 is optimized and my_module_2 isn’t).

Now, if  I try to set the optimization level 2 in the “Projects->Build Setting-> Synthesis-> Synthesis Optimization Effort -> Exaustive “ and try to switch off the optimization in the module by the .ctl file

ATTRIBUTE opt_level OF my_module_2 : module is 0 ;

it does not work as above, as it seems that the level 2 optimization overrides all control in the .ctl file.

Is there a way to request only a few modules not to be optimized in a global optimization setting ?

Many thanks for any hint ...

Marco

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1 Solution

Hello Marco,

Right now the only workaround would be to set the optimizations individually and not use the global optimization in the build settings. I know its cumbersome but that's the only option as of now.

Regards,

Dheeraj

View solution in original post

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5 Replies
DheerajK_81
Moderator
Moderator
Moderator
First comment on KBA First comment on blog 5 questions asked

Is it possible for you to share your project so that we can try to reproduce your issue?

Steps to share your project:

1. In the Build menu click Clean project (this will delete all Generated files and reduce archive size).

2. In the Project Explorer panel select project. Go-to File->Create Workspace Bundle->Minimal. Resulting archive file will have only files necessary for compiling of the project.

Regards,

Dheeraj

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Attachments are accessible only for community members.

Hi Deeraj,

Thanks for looking into this. I am attaching a test project with 3

instances of the same hardware component to test the optimization per

module. In this project (where the logic is redundant) setting the global

optimization to exhaustive reports 0% UDB usage even if I specifically set

the constraint to no optimization in the CTL file.

Regards,

Marco

On Thu, Aug 30, 2018 at 11:53 AM, ddka <community-manager@cypress.com>

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Hello Marco,

I'm able to reproduce your issue. Looks like the exhaustive configuration in the build settings is overriding the optimizations specified in the control file. I am looking at any workarounds possible! Will update here soon.

Regards,

Dheeraj

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Hello Marco,

Right now the only workaround would be to set the optimizations individually and not use the global optimization in the build settings. I know its cumbersome but that's the only option as of now.

Regards,

Dheeraj

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Thanks Deeraj. I will use this workaround.

Marco

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