- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi,
I'm trying to interface SN8000x with my stm32f429 custom board using SPI, since my board uses SPI6 I had to make some changes in the code, while digging through it I could find a statement in wwd_spi.c
/* Clear the CS pin and the DMA status flag */ | |
GPIO_SetBits( SPI_BUS_CS_BANK, ( 1 << SPI_BUS_CS_PIN ) ); /* CS high (to deselect) */ | |
DMA_ClearFlag( DMA1_Stream3, DMA_FLAG_TCIF4 ); | |
DMA_ClearFlag( DMA1_Stream4, DMA_FLAG_TCIF3 ); |
I think DMA_ClearFlag( DMA2_Stream6, xxxxxxxxxxxx); has to clear DMA_FLAG_TCIF3 instead of TCIF3, similarly in second one has to clear TFIF4 , I think both got swapped while writing drivers..
Am I right, or it has to be like this???
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
I reviewed the reference manual for the STM32F4XX processors and it seems that you are correct. DMA_FLAG_TCIF3 specifically refers to Stream 3 for either of the 2 DMAs. Same with DMA_FLAG_TCIF4 is for Stream 4 of either DMAs.
From the documentation for DMA_LIFCR and DMA_HIFCR:
"CTCIFx: Stream x clear transfer complete interrupt flag
Writing 1 to this bit clears the corresponding TCIFx flag in the DMA_LISR/DMA_HISR register"
In conjunction with this from DMA_LISR and DMA_HISR:
"TCIFx: Stream x transfer complete interrupt flag
This bit is set by hardware. It is cleared by software writing 1 to the corresponding bit in the
DMA_LIFCR/DMA_HIFCR register.
0: No transfer complete event on stream x
1: A transfer complete event occurred on stream x"
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi,
It looks Hari and Felix are both right, DMA_FLAG_TCIF4 and DMA_FLAG_TCIF3 should be swapped. I've checked the values of DMA_FLAG_TCIF4 and DMA_FLAG_TCIF3 definition in case they were swapped on purpose, they match the bits for DMA_HISR and DMA_LISR in the STM reference manual so they should be used as is. I'll alert our guys on this, thanks for finding this.
Thanks,
Jaeyoung
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi, Jaeyoung,
Thanks for the reply,,
Actually even If I correct that thing also I can't achieve WiFi communication through SPI interface,, Can you just check with the Broadcom engineers what is the issue and give a fix ASAP,?
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi Hari,
There doesn't seem to be an issue with our eval boards and we are not able to duplicate the problem. We encourage our customers to use SDIO instead of SPI for Murata modules.
Thanks,
Jaeyoung
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
I am currently working with a custom PCB that only allows for SPI communication (SPI2). My setup includes a STM32F415 micro and BCM43438 wifi chip (WICED-SDK-3.3.0).
I have swapped the TCIF flags, like so:
DMA_ClearFlag( DMA1_Stream3, DMA_FLAG_TCIF3 );
DMA_ClearFlag( DMA1_Stream4, DMA_FLAG_TCIF4 );
However, i cannot seem to communicate with the BCM43438. I am getting a "Read 0, instead of 0xFEEDBEAD from the WLAN chip" error. (see my post SPI WiFi Setup)
My platform makefile includes:
WLAN_CHIP := 43438
WLAN_CHIP_REVISION := A1
...
ifndef BUS
BUS := SPI
endif
VALID_BUSES := SPI
ifeq ($(BUS),SPI)
WIFI_IMAGE_DOWNLOAD := buffered
endif
...
What configuration am I missing? Do you a snippet of a platform that uses only SPI by any chance?
Thank you.
David
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi, The problem was with the GPIO pins I used I had to chage the SPI IRQ pin to a different one , which solved my probelm.