S25FL256 bulk erase doesn't functional

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dilic_2635671
Level 4
Level 4

Hi,

I am porting S25FL256 driver from NXP MPC5777M MCU to STM32L4. I am currently using Nucleo-144 board connecting to S25FL256 breakout board.

For some reason, the bulk erase doesn't seems functional - WIP never get set and and memory never set to all 1. I am able to communicate with the device getting IDs as following.

Before the BE, I issue Write Enable command and am able to confirm from logic analyzer.

I am wondering if there is any configuration setting I am missing or...

Thanks,

Dick

config: 0 status1: 0 status2: 0 eas: 24 manID: 1 devID: 24 CFImanID: 1 CFIdevID: 0x0219 CFILength: 0x4d

// Write Enable

uint8_t cmd = uint8_t(FLASH_CMD::WREN);     //0x06

m_dspi->write(&cmd, 1);

// Bulk Erase

uint8_t cmd = uint8_t(FLASH_CMD::BE);     // 0x60

m_dspi->write(&cmd, 1);

bool wip;

get_wip(&wip);

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dilic_2635671
Level 4
Level 4

I did try BE 0xC7 same result. Don't really know why there are 2 BE with different values. Thx

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dilic_2635671
Level 4
Level 4

I did try BE 0xC7 same result. Don't really know why there are 2 BE with different values. Thx

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dilic_2635671
Level 4
Level 4

I tried the WRR command write 0x1F, 0xFF to status-reg-1, config-reg-1 then read back - the status reg 1 and config reg 1 all 0.

Seems the write is not working at all.

Any ides what might cause this?

Thx

std::array<uint8_t, 3> cmd;

cmd[0] = uint8_t(FLASH_CMD::WRR);

cmd[1] = status_reg_1;

cmd[2] = config_reg_1;

m_dspi->write(cmd.data(), cmd.size());

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Hello Dick,

Please initiate the Clear Status Register (CLSR = 30h) command, before initiating any other command,

as this Status Register command resets bit SR1[5] (Erase Fail Flag).

After the Status Register bit SR1[5] bit (Erase Fail Flag) has been cleared, initiate the Sector Erase

(SE = D8h) command, to check if at least one sector can be erased (to all ONES).

How many S25FL256S devices have you tried?  Is the result the same issue, as previous?

Please advise as to your results/findings.

Best regards,

Albert

Cypress Applications Support

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Hi Albert,

Doesn't make any difference using CLSR. I also did software reset before issue any commands.

I just tried my 2nd breakout board, same result.

One thing I figured out is the WIP status 1 only last few us. I am assuming it will last for longer time.

Thanks,

Dick

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Hello Dick,

Thank you for your response.

Was the result the same when initiating the Sector Erase (SE = D8h) command?  There is no mention from your analysis.

Please refer to the attached KBA and App note in regards to the use of the WRR command

Best regards,

Albert

Cypress Semiconductor

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Hi Albert,

Seems getting better now. Below code is SE address 0 and 4READ 256 byte

starting address 0. The isse is the first byte 0x9F, all other 255 bytes

are fine.

// SE address 0

int32_t erase_res1 = m_spi_flash_hal.hal_sector_erase(0);

std::array<uint8_t, 256> inbuf;

// 4READ 13h address 0

int32_t rret = m_spi_flash_hal.spiffs_hal_read(m_spi_flash_hal.get_fs(), 0,

256, inbuf.data());

Thx,

Dick

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Hello Dick,

Sector Address 0 is a 4KB parameter sector.  Therefore, Command 4P4E = 21h (4-byte adrs)

or Command P4E = 20h (3-byte adrs) should be used to erase the 4KB parameter sectors.

Command 4SE = DCh (4-byte adrs) and Command SE = D8h (3-byte adrs ) are used to erase

the 64KB/256KB sectors.

Please confirm...

Best regards,

Albert

Cypress Applications Support

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Here is the result for bulk erase.

Command seq 0x06 (WREN), Bulk erase (0x60), 0x05 RDSR1.

Check the status register 1 WIP bit is not ON.

The READ4 0x13 sequence. The first byte is 0x93 instead of 0xFF.

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Here is another 0x06 0x60 0x05 0x13 sequence result. The first 8 bytes

just not quite right. See below. Thx

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Hi Albert,

Here is another for 0xDC sector erase.

1. WIP bit never set.

2. First 2 bytes not 0xFF

Any thoughts?

Thx

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