Design confirmation for CCG2 CYPD2122-20FNXIT charge through USBC to USB2 adapter dongle

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aldr_3203566
Level 4
Level 4
First like received

I am currently finalizing a prototype design for a USBC to USB2 charge through dongle based on the CYPD2122-20FNXIT and would like to confirm the design.  The product is to be connected to a mobile phone to allow a USB2 keyboard to be connected and charging at the same time.  There is an external MCU (not shown) that will control the charging enable/disable and provide the VBUS for charging.

The charge rate is limited to 5.0v at 1500mA and the PDO configuration table data will reflect this.

The J2 connector description is as follows...

Pins 1 through 5 are the PSoC programming header.

I believe programming is supported through the CC1 and CC2 lines, but would like to confirm this.

The PSoC connection provides a backup and debug option at the moment.

Pins 6 and 7 are USB data.

Pin 8 is a request from the external MCU to enable charging.

Pin 9 is a request from the CCG2 to enable the VBUS 5v power.

Pin 10-12 are VBUS power for charging.

Pin 13-15 are GND for charging.

I am attempting to fit the design on a paddle type USBC connector to minimize the design, as shown in the attached image.

Before the prototype is manufactured I would like to confirm the design feasibility with a community or Cypress engineer before production if possible.

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1 Solution

Hello Allan,

1) CYPD2122-20FNXIT does not support CC bootloader. You can continue using the SWD interface for programming.

2) You are right that it will be good to power the CCG2 via the USB-C connection as well. I would recommend including a 3.3V regulator to downconvert the 5V VCONN from type-c and provide it to VDDD (+3V3 in your schematic).

3) I am assuming either the mobile phone or the VTARG on J2 will have power at any point of time.

4) It is strongly recommmended to use VBUS FETs to switch the direction of power flow. The FETs can be switched from any GPIO of the CCG2 like you have used VBUS_ON. Many application diagrams in CCG datasheets illustrate this.

Regards,

Rajath

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3 Replies
aldr_3203566
Level 4
Level 4
First like received

In addition, missing information that I should add.

The above CCG2 will be powered from the host MCU through the J2 connector at pin1 at 3V3.

I am not sure what will happen if a USBC device is connected if the host MCU is not powered since the CCG2 will also not be powered.  Should this be corrected in such a way that the CCG2 always is running if a USBC connection is connected?

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Hello Allan,

1) CYPD2122-20FNXIT does not support CC bootloader. You can continue using the SWD interface for programming.

2) You are right that it will be good to power the CCG2 via the USB-C connection as well. I would recommend including a 3.3V regulator to downconvert the 5V VCONN from type-c and provide it to VDDD (+3V3 in your schematic).

3) I am assuming either the mobile phone or the VTARG on J2 will have power at any point of time.

4) It is strongly recommmended to use VBUS FETs to switch the direction of power flow. The FETs can be switched from any GPIO of the CCG2 like you have used VBUS_ON. Many application diagrams in CCG datasheets illustrate this.

Regards,

Rajath

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Hi Rajath,

Thank you for your suggestions.

I have made the changes to have a 3V3 regulator on board to power the CCG2 whenever there is a USBC connection.

The VBUS FETs had to be moved off to another PCB as this PCB is a small paddle design, similar to inside a cable.