Can i2c operate while the core is in deep sleep?

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Anonymous
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Hi there,

We have a sensor bus manager where we are pulling data from multiple sensors at a time. Is it possible to to do this while the system is in deep sleep/sleep mode? We should note that we are pulling data and have Bluetooth configured to a single core.

Previously, in psoc 4 the i2c could only operate while the core in in sleep mode. Is this the same for psoc 6?

Best,

Steve

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The PSoC 6 datasheet: http://www.cypress.com/documentation/datasheets/psoc-6-mcu-psoc-63-ble-datasheet-programmable-system... 

If you look at figure 2 you'll see that 1 of the SCBs is in light blue indicating that it works in deepsleep. Also the sub heading Serial Communication Block on page 8 makes mention of this as well:


Serial Communication Blocks (SCB) PSoC 63 has nine SCBs, which can each implement an I2C, UART, or SPI interface. One SCB will operate in Deep Sleep with an external clock, this SCB will only operate in Slave mode (requires external clock).

The TRM chapter on SCBs also mentions which modes work in deepsleep and how to configure the device:

http://www.cypress.com/documentation/technical-reference-manuals/psoc-6-mcu-psoc-63-ble-architecture...

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ToddD_41
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I2C masters do not operate while the device is in deep-sleep mode. One of the I2C Slaves can operate in deep-sleep power mode.

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Anonymous
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Hi tdu,

Could you point us to where we could find more information on this? Thank you.

Best,

Steve

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The PSoC 6 datasheet: http://www.cypress.com/documentation/datasheets/psoc-6-mcu-psoc-63-ble-datasheet-programmable-system... 

If you look at figure 2 you'll see that 1 of the SCBs is in light blue indicating that it works in deepsleep. Also the sub heading Serial Communication Block on page 8 makes mention of this as well:


Serial Communication Blocks (SCB) PSoC 63 has nine SCBs, which can each implement an I2C, UART, or SPI interface. One SCB will operate in Deep Sleep with an external clock, this SCB will only operate in Slave mode (requires external clock).

The TRM chapter on SCBs also mentions which modes work in deepsleep and how to configure the device:

http://www.cypress.com/documentation/technical-reference-manuals/psoc-6-mcu-psoc-63-ble-architecture...

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ShipingW_81
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500 replies posted 250 solutions authored 250 replies posted

Please note description in TRM "this is the only SCB that is available in the Deep Sleep power mode." means I2C / SPI slave wakeup available under DSM, not work directly under DSM, because mcu is not capable of handling data under DeepSleep mode. After waking up through address matching, device would get back to active mode for normal handling.

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