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Hello,
In the TRM, it mentions that one can access the FX3 internal MMIO space by use of three registers, PP_MMIO_ADDR, PP_MMIO_DATA, and PP_MMIO (which is a control register). However, I cannot create the behavior that is outlined in the TRM. Here's my code:
... #include "pib_regs.h" ... for (curAddr = firstAddr; curAddr < lastAddr; curAddr += 4) { PIB->pp_mmio_addr = curAddr; while ((PIB->pp_mmio & CY_U3P_PIB_MMIO_BUSY) > 0); PIB->pp_mmio |= CY_U3P_PIB_MMIO_RD; while ((PIB->pp_mmio & CY_U3P_PIB_MMIO_BUSY) > 0); buffer = PIB->pp_mmio_data; i += 4; } ...
If I place debug prints into the code, I see that all of the MMIO registers are always 0 (address, control, and data). If I query PIB->config, I can see that the PP_MMIO protocol is enabled. Does anybody know how this is supposed to work and why my code above does not perform as expected?
Thanks!
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Hi,
The Did you monitor the 30th bit of PIB->gpif_config? This is where you monitor whether PP mode is enabled or not. You have mentioned in your post that you looked at PIB->config.
Please confirm.
Regards,
-Madhu
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Hi Madhu,
I'm facing the same problem and would like a fix for this. Although I am able to program the PP_MMIO_ADDR register, but whenever I want to do I R/W, I'm unable to change the PP_MMIO register to actually perform the R/W. I always read 0.
My register value for PIB_CONFIG is 0xC8000000.
My register value for GPIF_CONFIG is 0xC0000A12.
Please note that I'm trying to access the MMIO space from an external processor via the p-port. Is there a special way to do this ?
Regards,
Bilal
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Hello,
I had not been checking the value of that register, but I changed its value to one and I still see the same behavior.
Thanks,
Jake