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Is there any way around GPIO pins being frozen during deep sleep or do you have to use the higher current Sleep mode if you want to keep an output pin active?
I need to produce a 31.25 khz output signal on a pin continuously for an external IC because the crystal I was using on that IC is becoming obsolete.
The project currently puts 4200 into deep sleep, wakes to process for short time and goes back to sleep.
I could live with up to 1mA consumption (though less is better). Sleep mode seems to be around 1.5 to 3.7mA if I use internal osc at 3MHz.
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PSoC 4 Architecture
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Some of the BLE modules have a built in watch crystal on-board; You could try one of those and use the WCO, but the clock is at 32.768 kHz instead of the 31.25 kHz that you want. Otherwise, routing a clock to the output pin with a clock-divider component may work...
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You could use the LFCLK as a clock component and rout that to a pin. Should work in deep sleep with 32kHz.
Then try to use a 31.25 kHz xtal and enable the WCO. Test if that runs correctly.
Bob
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Bob,
I understand the LFCLK is very inaccurate (60% tolerance), If I connect an external 31.25 kHz crystal to the micro then I might as well leave it on the external device as it is now and I still have the problem of the component becoming obsolete.
If not for the crystal becoming obsolete, I would not need to change the micro circuit. My thinking is that using the micro with a standard crystal (say 4Mhz) means I have a freely available crystal-based generation of the 31.25 kHz signal now but the current consumption will be too high.
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Some of the BLE modules have a built in watch crystal on-board; You could try one of those and use the WCO, but the clock is at 32.768 kHz instead of the 31.25 kHz that you want. Otherwise, routing a clock to the output pin with a clock-divider component may work...