S29GL01 Deployement In The MPC8321 Freescale Based Processor.

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Anonymous
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Dear Memory Experts,

We are using S29GL01 NOR flash in the MPC8321 freescale processor, there are two S29GL01 chips are deployed in the our board, each are having 128MB (2x64MB) density, but only 64MB are working, we are using u-boot-2014 u-boot and 3.14 kernel for development.

I am able to access only 64MB of memory out of 128MB rest are not detecting, however 64MB memory is working fine.Please let me know how i can access full 128MB of memory in the MPC8321 based processor.

Thanks,

Vidya Sagar

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1 Solution

Hi Vidya,

as I said before, we don't know your driver structure (Linux BSP) as well as processor documentation (GPIO control).

I think best is to consult with NXP. They are the owner of both (software and hardware) and can certainly tell you how

to control the GPIO, to access either the upper or lower 64 MB.

Thanks,

Gernot

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12 Replies
BushraH_91
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750 replies posted 50 likes received 250 solutions authored

Hello Vidya,

Thank you for contacting Cypress Community Forum. We will look into the issue and get back to you.

Regards,

Bushra

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BushraH_91
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750 replies posted 50 likes received 250 solutions authored

Hello Vidya,

Can you please provide the full part number?

Regards,

Bushra

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Anonymous
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Dear Bushra,

Full part number is S29GL01GS.

Thanks & Regards,

Vidya Sagar

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Hello Vidya,

if you have two S29GL01GS packages on your board, then you need to map two 128 MB memory windows in Linux or u-boot (e.g. via the physmap driver). Afterwards you need to probe them separately, i.e. the kernel needs to call the probing routine two times, with different base addresses. This should finally give you two MTDs, 128 MB each, that you can merge via mtdconcat if needed.

Best regards,

Gernot

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Anonymous
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Dear Gernot,

Thanks for your reply.

2x128MB chip are being used in the MPC8321 processor, however only 2x64MB are accessible memory, in u-boot and linux.

There is only one bank available in the flash, we are using u-boot-2014 and linux3.14 kernel for development, please suggest me where need to map in the source code.

Thanks & Regards,

Vidya Sagar

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Hi Vidya,

so when you say "only 2x64MB are accessible", you mean that both devices are correctly probed, that you get two MTDs of 128 MB each, but you can read/write only the lower 64 MB in each MTD, right?

Well, the size of the mapped address window in Linux is configured by the board driver. I do not have access to your full Linux BSP. Some BSPs use the physmap driver (drivers/mtd/maps/physmap.c), others call ioremap() directly. You will have to find that driver and make sure that 128 MB are mapped, two times (for both devices).

Also verify in the schematics that all address lines are connected, i.e. including address line A25.

Best regards,

Gernot

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Anonymous
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Dear Gernot ,

Yes, both chips are getting probed, but only 64MB, not full memory access.

Find the schematic, "STORAGE_EX" pin # A25 is connected to the GPIO114, what extra need to do to access memory in the u-boot source or linux source code and dts ?

Thanks & Regards,

Vidya Sagar

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Hi Vidya,

thanks for the schematics. I see that one device has A25 pulled down to ground and another device has it connected to STORAGE_EX, probably a GPIO. If it is connected to ground then only 64 MB will work. For the other device, you will have to control the GPIO manually. You can do this via a special map in Linux (enable complex mappings and implement word read/write functions). This is complicated but it is possible. Best would be of course to connect all address lines 1:1 to the memory controller.

Best regards,

Gernot

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Anonymous
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Dear Gernot,

Thanks for reply.

Please let me intimate how can proceed, we are using 3.14 kernel for development, how can be mapped full memory ?

Thanks & Regards,

Vidya Sagar

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Anonymous
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Dear Gernot,

Waiting for your reply.

Thanks & Regards,

Vidya Sagar

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Hi Vidya,

as I said before, we don't know your driver structure (Linux BSP) as well as processor documentation (GPIO control).

I think best is to consult with NXP. They are the owner of both (software and hardware) and can certainly tell you how

to control the GPIO, to access either the upper or lower 64 MB.

Thanks,

Gernot

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Anonymous
Not applicable

Dear Gernot,

If we provide the documentation and kernel then can you help us in the development.

Thanks,

Vidya

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