Macros for bit band access?

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Anonymous
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Are there macros anywhere in the standard generated code (or, in a code sample, if need be) for setting / clearing / toggling bits through the Cortex M3 bit-banding feature?

   

I'd like to take advantage of this for uninterruptible read/modify/write of some status bits associated with each of a bunch of buffers in the SRAM. From what I understand it should be possible, but I'm wondering if I need to roll my own. I'm OK with assembly, not so much with the C preprocessor.

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9 Replies
Anonymous
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Doug,

   

 

   

The info provided at the link below may be of some help.

   

http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.faqs/ka4203.html

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Anonymous
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Thanks, I will do that.

   

You guys should consider rolling this into the libraries that come with PSoC Creator. It looks to me like there's no impact on code size as long as it is unused.

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Anonymous
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 Thanks for the reference, dasq... I'm also interested in an easy and consistent way to access the bitband region.

   

 

   

For anyone interested, the target URL has been slightly changed to http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.faqs/ka4203.html

   

 

   

IOW, just add an 'l' to the original URL and you should be fine. But be aware, this document has been cached on the ARM site, so I'm not sure if that will limit its availability

   

-PCPete

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Anonymous
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bump for feature request! it would be great if the API generated defines for this so you don't need to roll your own.

ideally, the API functions for GPIOs etc should just USE this, they're crazy slow as it is now.

as an example, try running this and compare the speed. when just toggling pins, the three methods below got me output frequencies of about 300 KHz (API call), 1.1 MHz (API macro) and 1.7 MHz (bitbanding).

#define BITBAND_PERI_REF  0x40000000

#define BITBAND_PERI_BASE  0x42000000

#define BITBAND_PERI(a,b) ((BITBAND_PERI_BASE + (a-BITBAND_PERI_REF)*32 + (b*4)))  // Convert PERI address

#define TESTPIN_BITBAND_DATAOUT *((volatile unsigned char *) (BITBAND_PERI(Testpin_0,0))) // bit 0 is CY_PINS_PC_DATAOUT

#define TESTPIN_BITBAND_DATAIN  *((volatile unsigned char *) (BITBAND_PERI(Testpin_0,4))) // bit 4 is CY_PINS_PC_PIN_STATE

int main()

{  

    while (1) {

        // API call

        Testpin_Write(1);

        Testpin_Write(0);

      

        // API macro

        CyPins_SetPin(Testpin_0);

        CyPins_ClearPin(Testpin_0);

      

        // Bitbanding

        TESTPIN_BITBAND_DATAOUT = 1;

        TESTPIN_BITBAND_DATAOUT = 0;

    }

}

this is awesome!

team Cypress,

please implement this in the code-generators & replace all _write(1) (0) with this instead for a great & free speed-up

seems for GPIO TESTPIN_BITBAND_DATAOUT has a less stable duty cycle
test.PNG

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For fastest Pin write in PSoC5 you can use (use Release / Compile for Speed settings)

TestPin_Control=1; // 2 clocks

TestPin_Control=0; // 3 clocks

Explanation:

C++ vs Assembly vs Verilog. on Vimeo

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It seems in PSoC Creator 4.0 it looks like this:

while (1)

{

Testpin_DR = 1 << Testpin_SHIFT;  

Testpin_DR = 0 << Testpin_SHIFT;

I see 12MHz. Thank you.

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Evgeniy,

Indeed, looks like the Cypress changed underlying code and made it faster. Now setting pin High takes only one clock. Setting pin Low is also one clock, and 2 clocks goes to "for" loop. Attached screenshots at 24MHz

IMG_20180407_134859.jpg

Below is a screenshot when 8 consecutive Hi/Lo statement are placed in the loop, making it 1000 will assimptotically bring it to clock/2:

/odissey1

IMG_20180407_134359.jpg

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