on line flash gets erased

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deda_294911
Level 4
Level 4
Welcome!

hi every body,

i am using CY8C4245AXI-483 device. i have taken all protections and filtering as per given in datasheet(fig. 9) and trm.

i saw when power  fluctuates or smps is toggled on and off and on. all flash gets corrupt/erased?

please tell me the solution. flash program is in un protected mode.

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1 Solution

one more question is that what will happen to PSoc4(CY8C4245AXI-483) if power supply is switched ON-OFF-ON-OFF--------.

LET SAY EVERY 20 mSec. (IS THAT ONE OF THE CAUSE OF ERASING THE FLASH?)

1. FROM SUPPLY VOLTAGE FROM 1.8 TO 5 V.DC.

2.  FROM SUPPLY VOLTAGE FROM 0 TO 5 V.DC.

(prev. was incomplete)

View solution in original post

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24 Replies
Anonymous
Not applicable

First I would suggest to make all FLASH Change to protected mode and check again. Usually, it's not possible to erase the FLASH by accident.

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Then what about emulated eeprom. How can i write on line the parameters?

On Mar 28, 2018 2:02 PM, "user_377217153" <community-manager@cypress.com>

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Anonymous
Not applicable

Emulated EEPROM is merely value reading/writing of individual bytes using FLASH to store it.

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you mean after protecting the flash, em-eeprom gets automatically unprotected by creator/programmer while programming?

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Anonymous
Not applicable

The programmer will erase the chip flash when writing a new program; I believe this will include any Em-EEPROM that you have saved on the chip (if you want it to remain across programming, you might want to look into sFlash usage)

The Em-EEPROM itself would unprotect/reprotect the flash space when writing to the Em-EEPROM in code. But it shouldn't be getting changed by spurious/random code unless it is deliberate...

I'm not sure what you mean by "on line the parameters", if you could describe that more clearly?

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on line parameters settings means. suppose my instrument is flow controller

and i want to change setpoints,etc. parameters which are kept in em_eeprom.

after protecting flash is it possible to modify.

On Thu, Mar 29, 2018 at 9:13 PM, e.pratt_1639216 <

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Anonymous
Not applicable

Ah;

When you program the unit, it will wipe all of the Flash on the chip. This will include the Em-EEPROM, so the "on line" parameters will get cleared on reprogramming the board.

When the chip is set to protected however, it will only allow flash changes from the program on the chip itself, and no outside programmer can change the flash without erasing the entire chip's program.

You would need to store the "on line" parameters on the SFlash portion to have it survive reprograms, as that portion of the chip is not erased by the programmer iirc.

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i am not getting the term SFlash portion.

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Anonymous
Not applicable

SFlash is referring to the "supervisory flash", but generally shortenend to sflash. Here is the thread where I went through setting up SFlash reading/writing while I was learning how to use the PSoC 4: Supervisory Flash Write

The links and information in the thread should help you out with getting it all setup

Let me know if you have more questions

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where shall i get this project for 4.1 version

C:\Program Files (x86)\Cypress\PSoC Creator\4.0\PSoC Creator\examples\sampleprojects\SFlash_Example

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Anonymous
Not applicable

Create a new project in the PSoC creator; Select the PSoC 4 chip you are going to use, select "Example Code" (or example project, I forget), and choose the "SFlash_Example" to build an example project for the SFlash.

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there is no "SFlash_Example" project for PSoc 4200 series.

i get confused.

On Wed, Apr 4, 2018 at 8:52 PM, e.pratt_1639216 <

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Anonymous
Not applicable

Huh; Weird. I thought there was an sflash example in the creator. No matter

The links below describe what sFlash is and how to use it, with the second link containing an example demonstration from github to use the sFlash:

http://origin-www.cypress.com/file/206941/download

PSoC-4-BLE/100_Projects_in_100_Days/Day029_BLE_SFlash_Write at master · cypresssemiconductorco/PSoC-...

SFlash Writing target byte

Read SFlash from windows

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is there any technical manual for sflash for PSoc4200 series like sflash

row writing timing, minimum no. of bytes can be programmed.

i donot found information in trm or datasheet.

On Thu, Apr 5, 2018 at 8:17 PM, e.pratt_1639216 <

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Anonymous
Not applicable

The TRM has the information: http://www.cypress.com/file/126171/download

The sFlash is the same behavior as regular flash but uses Flash Macro 0 instead of Flash Macro 1 (Different section of flash as far as use is concerned)

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one more question is that what will happen to PSoc4(CY8C4245AXI-483) if

power supply is switched ON-OFF-ON-OFF

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one more question is that what will happen to PSoc4(CY8C4245AXI-483) if power supply is switched ON-OFF-ON-OFF--------.

LET SAY EVERY 20 mSec. (IS THAT ONE OF THE CAUSE OF ERASING THE FLASH?)

1. FROM SUPPLY VOLTAGE FROM 1.8 TO 5 V.DC.

2.  FROM SUPPLY VOLTAGE FROM 0 TO 5 V.DC.

(prev. was incomplete)

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Anonymous
Not applicable

The voltage rail will only affect how long it takes for the power to run out for powering the chip. But it should run for a small period of time after you switch it off. If you implement low power detection, then you can run some code specifically when the chip loses power and before it shuts off.

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i put one simple program. chip is totally write protected(PSoc4(CY8C4245AXI-483).

if power supply is switched ON-OFF-ON-OFF--------.(i am toggleing ground rail)

LET SAY EVERY 20 mSec.

1. FROM SUPPLY VOLTAGE FROM 1.8 TO 5 V.DC.

2.  FROM SUPPLY VOLTAGE FROM 0 TO 5 V.DC.

chip gets erased? but it does not happens with pic or atmel 89series controllers(same supply, same conditions). i have already put this question earlier in community.

is this series is useful in harsh conditions?

i want technical support for this.

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Anonymous
Not applicable

The chip flash only erases if you erase it using the programming port: SWD, JTAG, etc. using an external programmer to erase the chip. If you are writing to flash in the code written to the chip, then toggling the power will interrupt the last flash row it is writing to.

But, toggling the power while the chip is programmed and running on its own will NOT erase the entire chip.

(I thought you were referring to the individual flash rows being written and erased by the code on the chip itself)

Unless you are modifying the flash intentionally with flash read/writes on the code, it will not change no matter how the power fluctuates.

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dear friend, what you are saying is logically true but practically what i am saying is happening.

just programming only for ''hello'' on 16*2 display and

case 1   keeping totally chip flash in unprotected mode

case 2   keeping totally chip flash in protected mode

toggling the power as per above said.

in case 1 chip get erased may be within 5 Sec.

in case 2 it takes longer time may be 80-90 Sec.

it is happening. is there any technical/hardware solution.

but it does not happens with pic or atmel 89series controllers(same supply, same conditions).

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query was put in our community user_288758801 Aug 18, 2017 2:53 PM.

your answer was;

Depending on the physical orientation, chemical structure of the chips, placement on the board, stray cosmic radiation, code running, EMI reception of the electronics circuits, shielding (if any) of the flash, oxidation levels, wear level, power levels, etc.

  

It could just be that you got lucky with the Atmel controllers not being affected by the test scenario; It could be they are being effected, but in a different way; It could be that there is something else causing corruption of the cypress chip. There are too many things that could cause it imo.

now what i am doing is in the test lab with smps/linear supply and not on the vechile. is this chip is suitable? i am going in mask production of the equipment. please tell me frankly.

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Anonymous
Not applicable

If you are seeing this erasing behavior on more than one of the same chip type, then I wouldn't trust it. But I would test on more than one chip to make sure it is not a defect/issue with the chip under test in-specific.

That said, having the whole chip erase is a major issue for cycling power, and I would have to agree that other chips not erasing (or at least not showing the same issues) would make me steer clear of a self-erasing chip from power-toggling.

The rate at which you toggle the power may have an effect; Setting a voltage in the "unknown" region of the TTL topology will cause unpredictable behavior, and a slow enough voltage ramp between the toggles would give a long time for the chip to be unpredictable/corrupted.

Tl;Dr: Test the power toggling on at least 3 or 4 of the cypress chips to make sure the behavior is consistent and not a silicon defect. And if the issue persists, then I would recommend switching to a chip that will fit your requirements for the power-cycling ON/OFF.

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Anonymous
Not applicable

If you are writing flash when the power turns off, depending on how long the power lasts, then the flash will succeed or fail. If it fails, it will either rewrite some of the bytes, or none of them depending on the hardware specs. That should be listed in the TRM, but I cannot find the information with the perusal I did. Treat it as a corrupted-data state if power is lost during flash write imo.

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