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Hello,
I have a question about the iDAC on CY8C4024LQI-S401.
There is the explanation that two IDACs can be put in parallel to form an 8-bit IDAC in IDAC7 Component Datasheet.
What that mean like below?
and can I set the different range like below?
Best regards,
Yocchi
CY8C4024LQI-S401
Solved! Go to Solution.
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Yocchi,
Your schematic is correct. Adding iDACs in parallel is one way of increasing maximum current and adding resolution. I wrote an appnote on doing this several years ago for the PSoC 3/5 parts, but the concept is the same. See Cypress Appnote AN64275.
Regards,
Mark
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Yocchi,
Your schematic is correct. Adding iDACs in parallel is one way of increasing maximum current and adding resolution. I wrote an appnote on doing this several years ago for the PSoC 3/5 parts, but the concept is the same. See Cypress Appnote AN64275.
Regards,
Mark
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Hi, Mark
Thank you for your reply.
In case of PSoC4000S, I think 14bit DAC can be put with two 7bit DAC like below.
Is it right?
And we are anxious about glitch.
Unfortunately, PSoC4000S does not have "Strobe_Mode". Can we eliminate it using other method?
both DACs cannot be written at the exact same time. This glitch can be eliminated by setting the „Strobe_Mode‟
parameter to „External‟ in the customizer of each DAC. Then connect both strobe inputs to the same clock source.
Best regards,
Yocchi
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Combining the two IDACs as you show above should work for making a larger 14-bit IDAC.
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Yocchi,
There is only so far you can go and you really can't get 14-bits out of two 7-bit DACs. On paper you might be able to, but the absolute DNL of the hardware does not change, worse case it is 1 LSB for 7 bits, 2 LSBs for 8 bits, 4 LSBs for 9 bits, etc. You may be able to get a usable 9-bits, but the DNL may be more than you can tolerate.
Stobe mode, I keep asking for it, but since these DACs were primarily used for Cap Sense, it was felt there wasn't a need for it. If I had my way, ALL of our DACs would have a double-buffered strobe mode. I love the viDACs in PSoC 3/5 because of their flexibility, strobe/direct mode, voltage/current, and the DAC Bus!
Mark
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Mark,
I also second to make IDAC's double-buffered. Currently PSoC5 IDAC8 is single buffered, so there is no way to use hardware bus to populate buffers of several IDACs and then enable the outputs simultaneously.
/odissey1
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That is correct with the PSoC 3/5 Dac Bus, the strobe loads the data directly from the bus to the output. When using the CPU or DMA to write the data, the PSoC 3/5 viDACs are double buffered. The output isn't updated until the strobe signal is pulsed.
Mark