SGPIO Initiator to validate SGPIO Target design (FPGA+Silicon), is it possible on PSOC5?

[Anonymous]

Hi,

According to this file :

http://www.cypress.com/file/108536/download

PSoC3/5 support SPIO initiator.

I didn't use cypress board before and according to the file it seems a good board to validate SGPIO target design.

my questions :

     1. Is it possible to use it to create negative scenarios ?

     2. Is there any link to PSoC board components  that needed to support SGPIO Initiator?

[AnkitaS_51]

SGPIO Initiator component is no longer available in latest versions of PSoC Creator for PSoC3/PSoC5LP .You may have to create the custom component for it

[Anonymous]

Hi,

Could you explain what does it mean to "create the custom component for it"?

Is it a library that I should load?

[AnkitaS_51]

Please go through this Component Author Guide to understand the procedure of creation of custom Component in Creator:

http://www.cypress.com/documentation/component-datasheets/psoc-creator-component-author-guide

[RodolfoGL]

You can use the attached project as reference.

It contains a non-official component for the SGPIO Target and Initiator.

[Anonymous]

Hi ,

Thank you, does it mean the SGPIO initiator is a FPGA design ?

[RodolfoGL]

The SGPIO initiator is implemented on the Universal Digital Blocks (UDBs) from the PSoC.

The hardware design was done in Verilog, but that doesn't mean you can easily port it to a FPGA. The UDBs has some fixed function modules, which reduce the amount of PLDs required to implement whatever hardware block you wish.