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Hi,
AN75779 firmware FX3 with 32-bits interface is not detected in Device Manager (Imaging devices). GPIF with 16 bits interface works fine.
Attached both 16-bits and 32 bits cyfxgpif2config.h and changed isDQ32Bit parameter set to CyTrue in the firmware.
Thanks
Solved! Go to Solution.
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Hi,
The problem might be because of the noise associated with the gpif - fpga interface. Please rework the connector interface. The noise will propagate to the USB interface ans result in PHY errors.
Also, you can try reducing the voltage levels of the gpif interface and the corresponding VIOx power domains.
Regards,
- Madhu Sudhan
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Hi,
Your files look fine. Are these generate by the gpif designer? or did you made the modification (from 16 bit to 32 bit) yourself?
Can you attach your whole state machine project + fx3 firmware project?
One reason I could think why this was failing was, you might be using spi interface (useSpi = CyTrue) in the CyU3PDeviceIOConfigure API.
Also, for 32 bit make sure lppMode is set as io_cfg.lppMode = CY_U3P_IO_MATRIX_LPP_DEFAULT;
Regards,
- Madhu
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Hi Jagadeesh,
I was able to see FX3 in the Imaging section of the device manager with your project. (as in the image below).
Can you please check if FX3 appeared in the Other devices section, if so, go to update driver option and select "USB Composite Device" from the list it shows?
Regards,
- Madhu
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Hi,
I can see FX3 in camera devices when I unplug Superspeed Explorer kit from FPGA DEV board.
FPGA Development board is power off and all IO are assigned properly to FPGA I/O.
Its there any pullup/pulldown is need in the Superspeed Explorer Kit.
Below are signal used in the FPGA Dev board.
CLK - GPIO16 - PCLK
LV - GPIO_28 - CTL11
FV - GPIO_29 - CTL12
NSENSOR_RESET - GPIO_22 - CTL5
DATABUS_0 to 31 { GPIO0 to GPIO31 - DQ0 to DQ31}
Thanks
Jagadeesh
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Hi,
The problem might be because of the noise associated with the gpif - fpga interface. Please rework the connector interface. The noise will propagate to the USB interface ans result in PHY errors.
Also, you can try reducing the voltage levels of the gpif interface and the corresponding VIOx power domains.
Regards,
- Madhu Sudhan