FLAGC set to not empty after TD_Init

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lihac_660931
Level 1
Level 1

Hi,

I want to use Slave FIFO Mode.

In this setup, I want to utilize all End Point (2,4,6,8).

EP2 & EP4 is AUTOOUT=1 while EP6 & EP8 is AUTOIN=0.

I set PINFLAGSAB = 0, and PINFLAGSCD = 0, so that all FIFO flags are indexed as pointed by FIFOADR[1:0]

My problem is after initialization of the firmware.

FLAGB is set to LOW

FLAGC is set to HIGH, therefore I cannot write to EP2, if selected by FIFOADR[1:0]. Why?

and at Vendor Command  returning EP2468STAT value is 0x5A.

that is: EP8E,EP6E & EP4F, EP2F.

Why EP4F and EP2F at initialization?

(I attached my code)

Thank you for your help.

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1 Solution
lihac_660931
Level 1
Level 1

Hi srnt,

I think the problem is that current settings may need external clock from external master in-order to respond.

I am thinking that external master may start clocking when FLAGC toggles to not-empty.

I can see it toggles EP2 to not-empty, when writing to EP2 as long as external master is clocking.

Best regards,

Livie

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5 Replies
lihac_660931
Level 1
Level 1

I'm sorry correction:

EP2 & EP4 is AUTOOUT=1 while EP6 & EP8 is AUTOIN=1

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SrinathS_16
Moderator
Moderator
Moderator
1000 replies posted 750 replies posted 500 replies posted

Hello Livie Hayao,

Please modify the IFCONFIG register to use the internal clock during the initialization process. It is expected that the IFCLK must be present and running during the configuration of the endpoint buffers. In case you would like to use an external clock, change the IFCLK source to external after the initialization of the device.

Best regards,

Srinath S

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lihac_660931
Level 1
Level 1

Hi srnt,

Thank you for your help, I will give it a try.

I'll update IFCONFIG via vendor command.

Best regards,

Livie

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lihac_660931
Level 1
Level 1

Hi srnt,

I think the problem is that current settings may need external clock from external master in-order to respond.

I am thinking that external master may start clocking when FLAGC toggles to not-empty.

I can see it toggles EP2 to not-empty, when writing to EP2 as long as external master is clocking.

Best regards,

Livie

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Hi srnt,

Yeah, the problem is solved with the external clock from the external master.

I have a problem with this firmware, reading from EP6 (from external master), greater than 1024 cause the last buffer data to be zero.

Let's say, I need1050 number of data to read, the first 1024 is okay, but the next data is zero.

Please be inform that external master sends PKTEND.

Thank you for your support.

Best regards,

Livie

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