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From the schematic of the FX3 GPIO-to-HSMC adapter (CYUSB3ACC-006) it appears that the signals are placed somewhat randomly - some of the CTL and DQ signals go to one pin in a differential pair on the HSMC connector, and some share a pair with another signal. Is there any reason for this routing?
I'd like to create my own FX3-to-HSMC adapter PCB and re-route some of the CTL signals so I can expose 4 differential pairs on the HSMC connector and use them for another input to the FPGA board. I'd probably keep the pin-out the same except I'd move PMODE2 and CTL3 to the other side of J1C. Will changing the HSMC pins of these signals cause any issues?
Thanks!
-Colin
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Hi Colin,
There is no specific reason for routing the signals in random manner. You can route it in any other way but you have to take care in the User Constrain File.
Regards
Abhinav
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Hi Colin,
- Which FPGA board are you interfacing FX3 with?
- There are many unused pins present on the HSMC connector. Is it not possible for you to configure those pins as Differential pairs you need?
Regards
Abhinav
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Hi Abhinav,
Thanks for the reply!
I am using the Terasic DE10-Standard. Unfortunately I need to use four differential RX pairs, and I cannot reconfigure them because I need to use the hardware LVDS receiver. Here is the DE10-Standard HSMC pinout:
Currently, the FX3 adapter only leaves two RX pairs unpopulated.
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Hi Colin,
There is no specific reason for routing the signals in random manner. You can route it in any other way but you have to take care in the User Constrain File.
Regards
Abhinav