CyResetStatus is always set to 0x20

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Anonymous
Not applicable

Hi,

I'm using PSOC5 (CY8C5888AXI-LP096) and no matter how I reset my device, watchdog or power shutdown, when I startup the chip and read CyResetStatus it is always 0x20 which is preserved to 'software reset' as I see in CyLib.h

CY_RESET_LVID               (0x01u)


CY_RESET_LVIA               (0x02u)


CY_RESET_HVIA               (0x04u)


CY_RESET_WD                 (0x08u)


CY_RESET_SW                 (0x20u)


CY_RESET_GPIO0              (0x40u)


CY_RESET_GPIO1              (0x80u)

Can anyone help me understand how do I know which kind of reset was it?

Thanks in advanced.

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AnkitaS_51
Employee
Employee
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You can refer to the PSoC 3 / PSoC 5LP System Reference Guide  available in Help>System Reference Guides section in PSoC Creator for information regarding "CY_RESET_SW"

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Anonymous
Not applicable

I did read the reference.

I managed to see changes in CyResetStatus, but only for watch dog and not for reset due to low voltage.

I guess the reason is that I need to implement LVD in my schematics. The problem is that I can't find this LVD unit.

I tried to use this tutorial for adding LVD. But again, couldn't find this component in the components catalog.

http://www.cypress.com/file/318451/download

Can anyone help? I'm using PSoC Creator 3.3.

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