CY62128EV30 standby / retention current

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shma_1538871
Level 4
Level 4
25 replies posted 25 sign-ins 10 replies posted

Hi all,

I'd like to know Isb behavior.

What I'd like to know is Correlation with Vcc and Isb

If Vcc decreased , does Isb also decrease ?

Or Even if Vcc decreased, is Isb stable?

Best regards
Matsushita

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3 Replies
PradiptaB_11
Moderator
Moderator
Moderator
500 replies posted 250 solutions authored 250 replies posted

Hi Matsushita-san,

Theoretically speaking you should see a very small decrease in Isb when Vcc is decreased. The internal memory architecture is the deciding factor for how much % decrease/increase you observe.

Thanks,

Pradipta.

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Hi Pradipta san,

Thank you for your reply !

It is good information.

I think SRAM has internal LDO for each memory cell.

So even if Vcc decreased, voltage level of cell keep stable.

Is it correct ?  

Best regards

Matsushita

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Hi Matsushita-san,

Yes, the memories now a days have internal LDO to regulate the VCC and GND. So that is why the internal design becomes important. Say if i decrease the Vcc it may happen the Quiescent current of the memory cell/LDO decrease, similarly you can see a small dip in the Isb current. Or you can say that there can be provisions in the design to provide some extra current when Vcc drops to maintain the device performance. So in this case you might actually see a increase in current sometimes.

Thanks,

Pradipta.

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