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Hi,
I'm using the CYBLE-014008-00 and I have some problems with the TCPWM module in timer capture mode.
Basically, the timer counts the frequency of an input signal. HFCLK is at 24 MHz, and the timer is synced by a 12 MHz clock derived from HFCLK. The timer is started by the rising edge of the output of a PWM module, and the capture is on the falling edge of the same signal. The PWM has a pulse of 25 cycles of LFCLK (32768 Hz). I'm waking the device every 40 ms with the WDT to get a timer sample. During that time, I go to sleep. I wake up with the Capture interrupt of the timer, get the sample, and go to deepsleep. Once I have enough samples, I send a BLE notification with the data. I also wake up once per second to get an ADC measurement.
Everything is going well, my timer returns a pretty stable value within ±1 count between each sample. But every ~45 seconds, I get a drop of ~30 counts for one sample. With a logic analyzer, I've figured that it probably occurs when a timer is active during a BLE interval.
My question: can the BLE affect the timer? I've looked with a logic analyzer and the period of my PWM is not affected, so I don't see how the timer would be.
Thank you,
Fred
Solved! Go to Solution.
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Hi,
It seems that the problem was hardware. Sorry for taking of your time. The problem is indeed happening when a BLE transaction and a timer capture are going on at the same time, but the fix is hardware.
Thank you,
Fred
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Can you tell if you are using any crystals? Can you explain how you are monitoring the count value on the Logic Analyser?
Thanks,
Hima
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Hi,
It seems that the problem was hardware. Sorry for taking of your time. The problem is indeed happening when a BLE transaction and a timer capture are going on at the same time, but the fix is hardware.
Thank you,
Fred