AN65974 example show error 997 If pclk less than 80Mhz

[Anonymous]

AN69574 examples work well when PCLK is 100MHz.

If PCLK less than 80Mhz  Control center show error 997

[KandlaguntaR_36]

What is the host controller?

Are you trying Stream_IN or Stream_OUT or LoopBack?

Can you try the same with GPIFtoUsb Example project: \EZ-USB FX3 SDK\1.3\firmware\basic_examples\cyfxgpiftousb

You can change to PCLK by varying the first argument to 5 from 4 in the following Variable and build the project  then try

CyU3PPibClock_t pibClk = {4, CyFalse, CyFalse, CY_U3P_SYS_CLK}; This changes the PCLK to 80 MHz.

Note that this example does not need any external processor.

I attached the image file with CyU3PPibClock_t pibClk = {5, CyFalse, CyFalse, CY_U3P_SYS_CLK};

Load this and do IN Transfers in the control center the update.

[wuHa_1344001]

May be the Timing of FPGA is not match with clk_80M?

[Anonymous]

Hi Wu,

The timing issue on the FPGA side could be a problem. If you suspect so, please investigate in that point of view.

Regards,

-Madhu Sudhan

[BaAd_2759041]

hi madhu sudhan I am working with GPIFtoUSB  fx3 firmware example ,after I build the firmware when I try to boot by control center its not enumerating the elf, so endpoints are not detecting.