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I'm reaching out the community in hope someone can help me under stand this error I receive when a UDB symbol is created. I get setup I followed the tutorial on UDB editor guide. The terminals seem to exist in the schematic and there were no other steps taken after generating the symbol to configure the terminals, therefore I am lost and have no idea how to get past this error. Here is a screenshot:
Any ideas or suggestions would be appreciated!
Thanks
Solved! Go to Solution.
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Two points you need to change:
You did not add a new component to your project, but you used the name "topdesign" instead. right click in component view on the "Project" entry and select "Add component item" . choose a meaningful name for the UDB component file.
When done defining your UDB you may add another item: a verilog file. Copy and paste the verilog view into the verilog file. this enables you to make some modifications to your component.
Generate the symbol.
Bob
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Can you please post your complete project so that we all can have a look at all of your settings. To do so, use
Creator->File->Create Workspace Bundle (minimal)
and attach the resulting file.
Bob
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Hi Bob,
Thank you for taking a look into this! Here is a link to the file you requested:
Gerard
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Two points you need to change:
You did not add a new component to your project, but you used the name "topdesign" instead. right click in component view on the "Project" entry and select "Add component item" . choose a meaningful name for the UDB component file.
When done defining your UDB you may add another item: a verilog file. Copy and paste the verilog view into the verilog file. this enables you to make some modifications to your component.
Generate the symbol.
Bob
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Thanks Bob, Your solution worked like a charm. Didn't realize I was adding the component in the wrong section.
Thanks Again,
Gerard