Gettin analog HW Muxer to work with CH>8 and control register

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Anonymous
Not applicable

Hi everybody,

I'm looking for an answer how to select channels in analog hw muxer by using control register.

As I'm supposed to use analog muxer as a switch, i can't make it work with let's say 9 Channels as control register provides 8 lines only.

In switch mode one is supposed to use one input connection per analog switch.

How can i make this thing work? HW Muxer per default provides up to 16 diifferential inputs.

Thanks in advance!

Joe

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1 Solution
NoriTan
Employee
Employee
25 sign-ins 5 questions asked 10 sign-ins

I assumes in following description that PSoC 3/5LP is used to implement a multiplexer.  If you are going to use a PSoC 4 please let me know.

The Analog Hardware Mux component has two modes Mux and Switch.  The mode can be configured by the Component Configuration Tool dialogue.

If the component is configured as a 10-to-1 multiplexer in Mux mode, the component has 4 select lines to select one of 10 inputs.  In this mode, the switch is flipped at the timing of the clock input regarding the output of the 4-bit Control Register.

GS003319.png

If the component is configured as a 10-to-1 multiplexer in Switch mode, the component has 10 select lines which controls the switches between the inputs and the output individually.  In this case, 10-bit Control Register is required to control the multiplexer.  You must prepare two Control Register components because the maximum bit-width of a Control Register is eight.  You can turn ON and OFF any switches in this mode.

GS003320.png

Regards,

Noriaki

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6 Replies
Bob_Marlowe
Level 10
Level 10
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The Analog HW Mux component needs 4 bits to select one input out of 8, So you will need a control register of width 5 to select your signal out of more than 8 inputs.

Bob

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Anonymous
Not applicable

Thanks for your anser, Bob. But is this true for analog switch? Component switch automatically no. of lines required to 9 if i do increase number of inputs to 9.

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NoriTan
Employee
Employee
25 sign-ins 5 questions asked 10 sign-ins

I assumes in following description that PSoC 3/5LP is used to implement a multiplexer.  If you are going to use a PSoC 4 please let me know.

The Analog Hardware Mux component has two modes Mux and Switch.  The mode can be configured by the Component Configuration Tool dialogue.

If the component is configured as a 10-to-1 multiplexer in Mux mode, the component has 4 select lines to select one of 10 inputs.  In this mode, the switch is flipped at the timing of the clock input regarding the output of the 4-bit Control Register.

GS003319.png

If the component is configured as a 10-to-1 multiplexer in Switch mode, the component has 10 select lines which controls the switches between the inputs and the output individually.  In this case, 10-bit Control Register is required to control the multiplexer.  You must prepare two Control Register components because the maximum bit-width of a Control Register is eight.  You can turn ON and OFF any switches in this mode.

GS003320.png

Regards,

Noriaki

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noriakit_91​ you mentioned,

If you are going to use a PSoC 4 please let me know.

Related to Joe's question above. What would be the best solution to do say 17 channels of ADC on a PSoC 4?

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Hi,

I designed a project using the CY8CKIT-042 PSoC 4 Pioneer Kit as follows.  This may not be a best solution but MY SOLUTION.

GS004000.png

Because the maximum number of "PSoC 4 Sequencing Successive Approximation ADC" channels is 8, it is not available to contain a 17 channels multiplexer in the ADC component.  Instead an external multiplexer is added to be controlled by a control register.  One of the control register output is connected to the SOC input of the ADC component to start an ADC conversion.  Please note that the 7th output of the control register is configured as "Pulse" and the acquisition time of the ADC input is set to 17us enough to capture the input level.

The multiplexer is constructed by the internal multiplexer bus as follows.

GS004001.png

The ADC and the multiplexer are controlled by the firmware.

#include <stdio.h>

#include "project.h"

#define MUX_CHANNELS (17)

int main(void) {

    uint8_t ch;

    uint16_t data[MUX_CHANNELS];

    char sbuf[32];

   

    CyGlobalIntEnable; /* Enable global interrupts. */

    /* Place your initialization/startup code here (e.g. MyInst_Start()) */

    ADC_SAR_Seq_Start();

    UART_Start();

    for (;;) {

        for (ch = 0; ch < MUX_CHANNELS; ch++) {

            // Select a channel with SOC

            Control_Reg_1_Write(0x80 | ch);

            // Wait for ADC conversion

            ADC_SAR_Seq_IsEndConversion(ADC_SAR_Seq_WAIT_FOR_RESULT);

            // Store the conversion result

            data[ch] = ADC_SAR_Seq_GetResult16(0);

        }

        for (ch = 0; ch < MUX_CHANNELS; ch++) {

            sprintf(sbuf, "%02d: %04X\r\n", ch, data[ch]);

            UART_UartPutString(sbuf);

        }

        CyDelay(1000);       

    }

}

There is a disadvantage to construct a hardware multiplexer with the multiplexer bus.  A large number of UDB resources are required to make a digital decoder to select an analogue channel.

GS004002.png

In this case, 24 out of 32 Macrocells and 33 out of 64 Unique Pterms are consumed.  If you don't have enough UDB resource left, it is recommended to use a nominal analogue multiplexer component and trigger the ADC with firmware.

GS004003.png

Regards,

Noriaki

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odissey1
Level 9
Level 9
First comment on KBA 1000 replies posted 750 replies posted

Joe,

You can use custom ControReg32 for wide bus (>8) control:

[Verilog] Register access using CY_SET_REG

/odissey1

Reg32_01c.png

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