FX3 UsbspiGpioMode SpiSetConfig?

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dilic_2635671
Level 4
Level 4

Hi,

I am using the UsbSpiGpioMode code to development a FW so the host app can talk to a SPI slave device connect to FX3 kit.

My question is "why there is no CyU3PSpiSetConfig() function call to setup SPI config as UsbSpiDmaMode code does?"  If the SPI is not correctly config, how can it work?

In my case, I need to setup cpol and cpha. Below is the code from UsbSpiDmaMode code.

Please help.

CyFxSpiInit (uint16_t pageLen)

{

    CyU3PSpiConfig_t spiConfig;

    CyU3PDmaChannelConfig_t dmaConfig;

    CyU3PReturnStatus_t status = CY_U3P_SUCCESS;

    /* Start the SPI module and configure the master. */

    status = CyU3PSpiInit();

    if (status != CY_U3P_SUCCESS)

    {

        return status;

    }

    /* Start the SPI master block. Run the SPI clock at 8MHz

     * and configure the word length to 8 bits. Also configure

     * the slave select using FW. */

    CyU3PMemSet ((uint8_t *)&spiConfig, 0, sizeof(spiConfig));

    spiConfig.isLsbFirst = CyFalse;

    spiConfig.cpol       = CyTrue;

    spiConfig.ssnPol     = CyFalse;

    spiConfig.cpha       = CyTrue;

    spiConfig.leadTime   = CY_U3P_SPI_SSN_LAG_LEAD_HALF_CLK;

    spiConfig.lagTime    = CY_U3P_SPI_SSN_LAG_LEAD_HALF_CLK;

    spiConfig.ssnCtrl    = CY_U3P_SPI_SSN_CTRL_FW;

    spiConfig.clock      = 8000000;

    spiConfig.wordLen    = 8;

Thanks,

Dick

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13 Replies
dilic_2635671
Level 4
Level 4

Hi,

I was unable to get any SPI_CLOCK from the FPGA waveform. So I checked the init code and found out GPIO 53/56 are output. In the output case, doesn't gpioConfig.outValue should be CyTrue?

    /* Configure GPIO 53 as output(SPI_CLOCK). */

    gpioConfig.outValue    = CyFalse;

    gpioConfig.inputEn     = CyFalse;

    gpioConfig.driveLowEn  = CyTrue;

    gpioConfig.driveHighEn = CyTrue;

    gpioConfig.intrMode    = CY_U3P_GPIO_NO_INTR;

    /* Configure GPIO 56 as output(MOSI) */

    gpioConfig.outValue    = CyFalse;

    gpioConfig.inputEn     = CyFalse;

    gpioConfig.driveLowEn  = CyTrue;

    gpioConfig.driveHighEn = CyTrue;

    gpioConfig.intrMode    = CY_U3P_GPIO_NO_INTR;

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No, In output case,     gpioConfig.inputEn     must be False and gpioConfig.outValue   can be False or True. But in the example project we have chosen it as False. It means the initial out value is Low. If you set gpioConfig.outValue    = CyTrue, the initial value will be High.

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KandlaguntaR_36
Moderator
Moderator
Moderator
25 solutions authored 10 solutions authored 5 solutions authored

CyU3PSpiSetConfig() is used in the UsbSpiDmaMode example project because there you can use the SPI interface (SPI Block).

In UsbSpiGpioMode, we are using GPIOs to implement SPI functionality so there we are not at all using SPI Block. Therefore, there is no use of CyU3PSpiSetConfig().

Here, you have to configure the GPIOs and toggling the clock as per your Cpha and Cpol requirement respectively.

Example:

For Cpol = 0, you have to set the SLCK GPIO to True then False. This is implemented in the SPIGpiomode examaple

Snippet from  UsbSpiGpiomode example project:

         CyU3PGpioSetValue (FX3_SPI_MOSI, ((data >> (7 - i)) & 0x01));

       CyFxSpiSetClockValue (CyTrue);

        CyU3PBusyWait (1);

        CyFxSpiSetClockValue (CyFalse);

        CyU3PBusyWait (1);

For Cpol = 1, set the SCLK GPIO to False then True.

You can modify above snippet as below:

          CyU3PGpioSetValue (FX3_SPI_MOSI, ((data >> (7 - i)) & 0x01));

        CyFxSpiSetClockValue (CyFalse);

        CyU3PBusyWait (1);

        CyFxSpiSetClockValue (CyTrue);

        CyU3PBusyWait (1);

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dilic_2635671
Level 4
Level 4

Ok. Thx

How about setting CPHA to 1?

There is GpioInit for clock. How can I setup to 100KHz?

    /* Initialize the GPIO module. */

    gpioClock.fastClkDiv = 2;

    gpioClock.slowClkDiv = 0;

    gpioClock.simpleDiv  = CY_U3P_GPIO_SIMPLE_DIV_BY_2;

    gpioClock.clkSrc     = CY_U3P_SYS_CLK;

    gpioClock.halfDiv    = 0;

    apiRetStatus = CyU3PGpioInit(&gpioClock, NULL);

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dilic_2635671
Level 4
Level 4

Hi,

I am trying UsbSpiRegMode project to see if I can get it work. I think this sample project seems to have more control over SPI init.

At least I can setup CPOL=0, CPHA=1 and clock to 100KHz.

Since my data buffer already good for r/w, so the only thing I need is call CyU3PSpiTransmitWords() to transfer to SPI. For some reason, I just can't see the data I send out.

Is there anything I might be missing so the transmit is not functional as I expected?

CyU3PReturnStatus_t

CyFxSpiTransfer (

        uint16_t  byteCount,

        uint8_t  *buffer,

        CyBool_t  isRead)

{

    CyU3PReturnStatus_t status = CY_U3P_SUCCESS;

     CyU3PSpiSetSsnLine (CyFalse);

     status = CyU3PSpiTransmitWords (buffer, byteCount);

     if (status != CY_U3P_SUCCESS)

     {

          CyU3PSpiSetSsnLine (CyTrue);

          return status;

     }

     status = CyU3PSpiReceiveWords (buffer, byteCount);

     CyU3PSpiSetSsnLine (CyTrue);

     return CY_U3P_SUCCESS;

}

Thanks,

Dick

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MilkFish,

What is your Slave device here?

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dilic_2635671
Level 4
Level 4

I step into the code and verified the buffer into CyFxSpiTransfer is correct which came from EP0. I also used Diolan adapter doing the same thing which verified slave device is function.

So my question is - what wrong with CyU3PSpiTransmitWords() function? Is there anything I am missing here?

DLN-2 USB-I2C/SPI/GPIO Adapter

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dilic_2635671
Level 4
Level 4

Any suggestions? I am stuck. Thx

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dilic_2635671
Level 4
Level 4

It's SRAM in a FPGA board. Thx

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dilic_2635671
Level 4
Level 4

FX3-GPIO.png

From the waveform above, CLK is fine, SS is active low, but the rxd which is the receive data.

So my question is "why the CyU3PSpiTransmitWords() not transmit anything out?"

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dilic_2635671
Level 4
Level 4

Any suggestions?

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dilic_2635671
Level 4
Level 4

I thought the issue must be the config. I have been tried to do different SPI init config setting. Nothing actually working.

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Anonymous
Not applicable

Hi,


What error code does the CyU3PSpiTransmitWords API return?

Regards,

-Madhu Sudhan

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