Data transfer between FPGA over USB interface to processor (Host USB)

[Anonymous]

Hi,

   

Please refer the attached representation. I have implemented an USB PHY using Cypress FX2LP CY7C68014A USB Controller between FPGA and processor. Processor has an USB host.

   

On a command received from processor (over USB), FPGA should send a stream of data back (over USB).

   

I have developed firmware to transfer data from USB controller input (D+/D-)  to FPGA (over 8 bit parallel) , but how should I transfer data recieved by USB Controller (FX2LP) from FPGA (8 bit parallel) to processor (over USB, D+/D-) over USB.

   

Can someone help me with this..

   

Thanks in advance,

   

Dhara.

[hekuc_2687271]

You need to implement Slave FIFO interface in FX2LP for the communication between FPGA and the USB Host.

You can refer to chapter 9 of FX2LP TRM for the interface details.

You can refer to the below application note for the firmware implementation of the Slave FIFO interface

http://www.cypress.com/documentation/application-notes/an61345-designing-ez-usbr-fx2lptm-slave-fifo-...

Let me know if you have any questions