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Hi,
I need to create a delta-sigma modulator for a signal that isn't necessarily positive, for example lets say that the signal is in the range (-1,1)
I'll need an option to reset the modulator between different conversions.
This project is for a PSoC 5 architecture.
I noticed that there are analog primitives in PSoC creator. two of which can be relevant:
1. ds_mod (DS Modulator).
2. scblock.
neither of them has a data sheet so I'm not sure how to use them.
Any Ideas which is best to use and how to define it correctly?
Attach is a screenshot of the primitives.
Thanks,
Peli
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PSoC cannot handle negative input voltages. You need to level-shift them so they are always positive.
For creating you own modulator - look at this component for a starting point: http://www.cypress.com/?app=forum&id=2492&rID=76867 (and there is a decimator as well: http://www.cypress.com/?app=forum&id=2492&rID=76872 )
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Simple methods to level shift, attached.
Regards, Dana.
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Give it one more try, Dana...
Bob
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Zip file attached, maybe......
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Zip file attached, rename it, change suffix to .zip, then expand.
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Some funny guy told me that computers are deterministic. He now is working in Las Vegas...
Bob
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Thanks for the help guys!
Dana I'll look into the voltage shifting methods.
I guess I'll have to use the modulator hli referenced (Kees SC Modulator). It's a shame that the delta-sigma
Modulator primitive in PSoC Creator doesn't have any documentation :/.
A question that I'm wondering about, since there are Inverting amplifiers in PSoC create negative voltages, are their outputs only to be used as an input for external components?
Thanks again,
Peli
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An inverting amplifier takes the difference of its inputs, negates the value and amplifies it by the gain. The result is *ALWAYS* limited in the range between analog ground and analog supply, so there is no negative value, never ever.
On a PSoC5 (as opposed to PSoC4) you may feed back the output of the amplifier without using a pin and use it as an analog signal.
Bob
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The inverting amplifiers cannot create negative voltages. The inverting PGA works with respect to a reference voltage. Input and output are limited to the rails.
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Thanks for the clarification.
I'm using a a PSoC 5 development kit.
Is it necessary to use external components (such as resistors) for the shift and amplify operation,
or is there a solution using only internal components?
Thanks
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No, in order to handle an external signal that is < Vssa you have to
level shift it before it is applied to a pin. Note the A/D, DelSig, can
handle a slightly - analog signal, see below. But thats it. If you try to
go more negative than ~ a Vbe drop you are in trouble. You could
trigger the SCR latchup mechanism inherent in CMOS, typically
toast the part, or at minimum inject a bunch of charge into substrate
and get toally unpredictiable logic operation.
Note this does not apply to OpAmps as their output can physically
never go below Vssa ground.
You could always do something crazy like operate the PSOC off split supplies,
but then all interface to the part still is tied its supply rails as limitations. Very
complicated, but could be done. Much easier to level shift input signal I would think.
Regards, Dana.
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Hi,
I Tried using Hli recommended modulator (Kees Modulator) and I'm having some difficulties while debugging:
1.When I try to measure the Voltage left After each Modulation Iteration it always show zero.
2. I tried using a basic counter to count the '1's in the modulator output. I used A slow clock (10KHz) and stopped the device in the debugger and view the counter value but it changes very rapidly, so when I expected to see 1, after the first positive value in the modulator output, I see something like 60. I figure I'm doing something wrong with the counter or the interrupt method. I tried using the interrupt block (ISR) to stop and view the results but it didn't help.
I already checked that the DAC value is within the supported modulator range.
Any Ideas what am I doing wrong?
Thank, Peli
P.S
See attached the modulator test configuration
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When debugging you stop the CPU, but the hardware components continue to run. So it is rather difficult observing counters, timers and other parts in the debugger. You probably have to use a different approach (ie. saving intermediate results to an array for later inspection) to get an insight into your running hardware.
Bob
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Hi Bob,
Is there some way to make an Interrupt change the enable value in the counter to '0', or perhaps stop the clk?
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Of course you may stop the counter, set it to any value and restart it within the interrupt routine or stop a clock by gating it with a control register.
But take care: I once tried to set a breakpoint in my running program and discovered (with the help of Cypress) that the setting took so long that my counter overflowed and did not deliver my wanted values
Bob
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Hi,
I'm looking for a down counter component in order to control the counter enable entry, so that it will stop counting after a predetermined number of clock cycles. This can be done by feeding the counter enable entrance with an AND gate whose entries are:
1. data entry (modulator output).
2. A signal which is '1' when the counter is greater than 0 and '0' when the counter equals '0'.
That way I should be able to view the number of '1's In the modulator output at different times.
I can find only a cyclic down counter in PSoC Creator, but I need a non cyclic one. Any ideas how to make it into a non cyclic counter, or how to build a non cyclic down counter?
Thanks,
Peli
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Use a LUT or demux to halt the counter based on a count ?
Maybe a control reg to reset the state machine.
Regardfs, Dana.