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      • 15. Re: PSoC 4 SPIM/SPIS (SCB) Example Problems

         I believe I have global interrupts enabled. The cyGlobalIntEnable has been used so I would assume it is working. I don't think I missed this one out, but I may have. 

           

         

           

        Thanks for for the link Dana. I will see if I can get one in 3 day shipping as this is a time critical development! 

           

         

           

        Thanks once again gain for all the help everyone.

        • 16. Re: PSoC 4 SPIM/SPIS (SCB) Example Problems
          JoMe_264151

          The actual project you provided did not have a CyGlobalIntEnable

             

           

             

          Bob

          • 17. Re: PSoC 4 SPIM/SPIS (SCB) Example Problems

             Hi Bob,

               

            You are quite correct, I did not have CyGlobalIntEnable; I have since added this line after starting both SPI SCB blocks.

               

            I have created some printouts of what the code is returning when I run it.

               

             

               

            Starting up
            SPIM TX Buffer Length: 0
            SPIM RX Buffer Length: 8
            SPIM Read: 255
            SPIM RX Buffer Length: 7
            SPIM Read: 255
            SPIM RX Buffer Length: 6
            SPIM Read: 255
            SPIM RX Buffer Length: 5
            SPIM Read: 255
            SPIM RX Buffer Length: 4
            SPIM Read: 255
            SPIM RX Buffer Length: 3
            SPIM Read: 255
            SPIM RX Buffer Length: 2
            SPIM Read: 255
            SPIM RX Buffer Length: 1
            SPIM Read: 255
            SPIM RX Buffer Length: 0
            SPIS TX Buffer Length: 7
            SPIS RX Buffer Length: 0
            SPIS Read: 0
            SPIS RX Buffer Length: 0
            SPIS Read: 0
            SPIS RX Buffer Length: 0
            SPIS Read: 0
            SPIS RX Buffer Length: 0
            SPIS Read: 0
            SPIS RX Buffer Length: 0
            SPIS Read: 0
            SPIS RX Buffer Length: 0
            SPIS Read: 0
            SPIS RX Buffer Length: 0
            SPIS Read: 0
            SPIS RX Buffer Length: 0
            SPIS Read: 0
            SPIS RX Buffer Length: 0

               
               
                    
               
                As you can see the RX buffer for the master is being filled, assumably by the slave device. However, the data inside that is not the data transmitted by the slave. When looking at the slave you can see that indeed the data is still in the TX FIFO and that the master has not transmitted anything to the slave. I have enabled the global interrupt enable and it has not changed the response of the code.   
               
                    
               
                I have got an oscilloscope onto the pins also. There is no signal on any of the master lines (Clock, MOSI or SS0). The SS0 remains high the entire time. My oscilloscope is not the greatest (as it is causing the PSoC to be powered through the earth clip on the scope) but it does indicate that nothing is happening on the pins.    
               
                    
               
                I am still working on getting a logic analyser, but I would assume if my scope shows nothing, the analyser will also say there is not signal ocurring. It seems like the PSoC is not generating the SPI outputs?   
               
                    
               
                Any advice on the next steps to take?   
               
                    
               
                Regards,   
               
                    
               
                EDIT::    
               
                I have got my hands on a logic analyser (a cheap chinese one). I have hooked it up and selected the channels to the correct outputs (I think). The MOSI and the Enable lines are working (I think) as there is definitely something happening on them. However, there is nothing on the clock line. I am not sure why but there is no clock pulses which is definitely why it is not working. Any suggestions?   
               
                    
               
                EDIT2:: Now I can confirm the clock and the enable lines ARE working. Running the example it does indeed produce the number of clock lines and for the correct time period of the enable pin. However; nothing is going out on the MOSI line.    
               
                    
               
                    
            • 18. Re: PSoC 4 SPIM/SPIS (SCB) Example Problems

               After doing some further thinking and looking at the pins, I thought could it be related to the fact that MOSI is used in the bootloader as the TX pin? P4_0 and P4_1 are used in the UART bootloader sequence, would it be possible that the use of the bootloader would result in MOSI not being able to work?

              • 19. Re: PSoC 4 SPIM/SPIS (SCB) Example Problems

                I am about to start developing code for a MCP2515 CAN controller connected to a PSoC 4200 (4200BLE in my case). Did you ever resolve this issue? What was the root cause of the issue you were experiencing?

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