Simple DDS [State Variable, IIR]

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ETRO_SSN583
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Here is a DDS approach another poster turned me on to, very fascinating.

   

 

   

Think State Variable, second order, 2 integrators + sign change = oscillator. Or think

   

second order IIR with positive feedback.

   

 

   

Runs just from C code, 80 uS ( 12.5 Khz ), 40 samples/sine.

   

 

   

With optimization, conversion to fixed point, binary size elements, ASM vs C, or HW solution,

   

should yield much higher freq.

   

 

   

Add a timer to control code placed in ISR, eg.  sample period, or just use a delay function to control sample rate.

   

 

   

Regards, Dana.

   

 

   

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ETRO_SSN583
Level 9
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Forgot to include this reference -

   

 

   

www.ee.ic.ac.uk/pcheung/teaching/ee3_Study_Project/Sinewave%20Generation(708).pdf

   

 

   

Regards, Dana.

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ETRO_SSN583
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The other way of tuning the DDS is of course keeping poles on unit circle.

   

 

   

Regards, Dana.

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Anonymous
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 Interesting approach

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Anonymous
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Hi Dana

   

 

   

This is great idea many thanks.

   

 

   

I´m testing it tuning frequency with ISR and working fine !

   

 

   

Is possible making with similar method Karplus Strong synthesis ?

   

 

   

Kamil

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ETRO_SSN583
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I would think so. One could take the transfer function, and factor the

   

sinusoidal component from the rise/decay element transfer function.

   

Or implement the transfer function directly in IIR form. Looks like an

   

even simpler function from inspection.

   

 

   

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ETRO_SSN583
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A couple of references. Note the Stanford f(t) just looks like a damped sine,

   

so seems like straightforward cascade of sine generator and exponential decay

   

block.

   

 

   

music.columbia.edu/cmc/musicandcomputers/chapter4/04_09.php

   

 

   

ccrma.stanford.edu/~jos/lab_inst/lab_inst.pdf

   

 

   

Regards, Dana.

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ETRO_SSN583
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I have not yet tried this but seems if you recompute the coefficients of the

   

diff eqn. for binary  value, like 32 or 64 (samples/sine, sample rate), might

   

get tighter code loop, eg. higher frequency out of the design. Food for thought.

   

 

   

Regards, Dana.

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Anonymous
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Many thanks interesting references.

   

 

   

Kamil

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Anonymous
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Hi Dana

   

I´m implementing simple component from your great IIR filter sine idea.

   

Kamil

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Anonymous
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My simple questions - is possible make this IIR sine with DFB component ? (respective karplus strong DFB ?)

   

 

   

Thanks info Kamil

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ETRO_SSN583
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Certainly Verilog. I would assume, because of simplicity of IIR

   

architecture DFB would also work, At the moment I do not have

   

time to do this, but would bet much >> frequency generated would

   

be result, and of course easier tunability.

   

 

   

The real investigation would be to look at integer math solution that keeps

   

poles on unit circle while being tuned. That should result in highest performance.

   

 

   

Regards, Dana.

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Anonymous
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Hi Dana

   

 

   

Many thanks info

   

 

   

Kamil

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