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Hi,
If all others fails => read the Datasheet carefully.
The SW_Tx_UART supports PSoC 3, PSoC 4 and PSoC 5LP.
Small notice on the page 7 of the SW_Tx_UART Version 1.10 Datasheet
.... is IMPORTANT ....
"Software Transmit UART component requires to have Instruction Cache to be enabled for PSoC 3 and PSoC 5LP. This could be done in PSoC Creator project Design-Wide Resources editor on the System tab. By default, this option is enabled".
If the Instruction Cache is disabled the SW_Tx_UART works but erroneously.
Behaviour - using 115200 Baudrate and 24MHz BusClock same number of characters transmitted, but all characters NONREPRODUCIBLE - RANDOMLY substituted.
NO WARNING in PSoC Creator 3.0 compilation/linking, NO USABLE INFORMATION from the logic analyzer.
May be this helps.
Regards,
Viktor
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PSoC 3
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Two questions:
1st: Why did you disable the instruction cache?
2nd: How many days it took you to find out?
Bob
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@Viktor, curious, running at much lower baud rates does SW UART
work ? Would seem cache might be needed as rates get higher
to keep up with insruction execution demand.
Regards, Dana.
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Hi Bob and Dana
a. The AN66444 - Correlated Double Sampling set for CY8C3866AXI-040 with INSTRUCTION CACHE DISABLED.
Device selector changes to the CY8C5868LP035 changes NOT the state INSTRUCTION CACHE DISABLED.
b. About 6 hours .....
c. Working TestProject for SW_TX_UART testing from PSoC Creator Version 3.0 CP7 modified for Tx P6[6] with MAX3232 on CY8KIT050B included.
d. Communication results - download files - included .....
e. On lower Baudrates than 115200 is communication OK with INSTRUCTION CACHE DISABLED.
Regards,
Viktor
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